Stats Chippac Pte. Ltd.

ChanHoon Ko

HeeJo Chi

NamJu Cho

Junwoo Myung

SangJin Lee

Wonil Kwon

A method of manufacture of an integrated circuit packaging system includes: forming a peripheral interconnect having a bond finger and a contact pad with a trace in direct contact with the bond finger and the contact pad, the bond finger vertically offset from the contact pad; connecting an integrated circuit die and the bond finger; and forming a module encapsulation on the integrated circuit die, the bond finger and the trace exposed from the module encapsulation.

Integrated circuit packaging system with redistribution layer and method of manufacture thereof

A method of manufacture of an integrated packaging system includes: providing a substrate; mounting a die over the substrate; mounting an interposer having a slot over the die; covering a first encapsulant over the die and the interposer, a central region of the interposer exposed from the first encapsulant; and forming a hole through the first encapsulant to expose a peripheral portion of the interposer.

Integrated circuit packaging system with package on package support and method of manufacture thereof

A method of manufacture of an integrated circuit package system includes: providing a through-silicon-via die having conductive vias therethrough; forming a first redistribution layer on a bottom of the through-silicon-via die coupled to the conductive vias; forming a second redistribution layer on the top of the through-silicon-via die coupled to the conductive vias; fabricating an embedded die superstructure on the second redistribution layer including: mounting an integrated circuit die to the second redistribution layer, forming a core material layer on the second redistribution layer to be coplanar with the integrated circuit die, forming a first build-up layer, having contact links coupled to the integrated circuit die, on the core material layer, and coupling component interconnect pads to the contact links; and forming system interconnects on the first redistribution layer for coupling the through-silicon-via die, the integrated circuit die, the component interconnect pads, or a combination thereof.

Integrated circuit package system with embedded die superstructure and method of manufacture thereof

A method of manufacture of a semiconductor packaging system includes: providing a substrate; mounting a semiconductor chip to the substrate; mounting a pillar ball having a ball height electrically connected to the substrate; mounting an interposer above the semiconductor chip and electrically connected to the pillar ball; and wherein: mounting the interposer or mounting the substrate includes connecting the pillar ball to a pillar base having a base height substantially less than the ball height of the pillar ball and the pillar base having vertical sides not covered by the pillar ball.

Semiconductor packaging system with multipart conductive pillars and method of manufacture thereof

A method of manufacture of an integrated circuit packaging system includes: providing a pillar ball; mounting an interposer having a first functional side and a second functional side over the pillar ball and a semiconductor chip; encapsulating the interposer, the pillar ball, and the semiconductor chip with an encapsulation; forming a via through the first functional side and the second functional side of the interposer, and through the encapsulation to expose a portion of the pillar ball; and filling the via with a pillar post.

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Incheon, South Korea

ChanHoon Ko