Applied Materials, Inc.

Other

Chang-Lin Hsieh

Yan Ye

Diana Xiaobing Ma

Jie Yuan

Hui W Chen

Terry Leung

Jennifer Y Sun

Shawming Ma

Wen-Chiang Tu

Allen Richard Zhao

Senh Thach

Lee Luo

Gerald Zheyao Yin

Claes H Bjorkman

Xiaoye Zhao

Jie Zhou

Theodoros Panagopoulos

Zhifeng Sui

Hoiman Raymond Hung

Hun Sang Kim

Judy Wang

Sum-Yee Betty Tang

Bryan Liao

Xiancan Deng

Brian Sy Yuan Shieh

Coriolan I Frum

Xian-Can Deng

Chung-Fu Chu

Binxi Gu

QiQun Zhang

Silvia Halim

Qiqun Zheng

Takehiko Komatsu

Yves Pierre Boiteux

Ivano Gregoratto

Etching of carbonaceous layers with an etchant gas mixture including molecular oxygen (O) and a gas including a carbon sulfur terminal ligand. A high RF frequency source is employed in certain embodiments to achieve a high etch rate with high selectivity to inorganic dielectric layers. In certain embodiments, the etchant gas mixture includes only the two components, COS and O, but in other embodiments additional gases, such as at least one of molecular nitrogen (N), carbon monoxide (CO) or carbon dioxide (CO) may be further employed to etch to carbonaceous layers.

Plasma etching carbonaceous layers with sulfur-based etchants

A method of etching organic low-k dielectric materials is provided herein. In one embodiment, a method of etching organic low-k dielectric materials includes placing a substrate comprising an exposed organic low-k dielectric material in an etch reactor; supplying a process gas comprising an oxygen-containing gas, a nitrogen-containing gas, and methane (CH); and forming a plasma from the process gas to etch the organic low-k dielectric material. The organic low-k dielectric material may include polymer-based low-k dielectric materials, photoresists, or organic polymers. The oxygen-containing gas may be oxygen (O) and the nitrogen-containing gas may be nitrogen (N).

Method of etching an organic low-k dielectric material

Method, materials and structures are described for the fabrication of dual damascene features in integrated circuits. In via-first dual damascene fabrication, a bottom-antireflective-coating ('BARC') is commonly deposited into the via and field regions surrounding the via,. Subsequent trench etch with conventional etching chemistries typically results in isolated regions of BARC,, surrounded by 'fencing' material,, at the bottom of the via. Such fencing hinders conformal coating with barrier/adhesion layers and can reduce device yield. The present invention relates to the formation of a BARC plug,, partially filling the via and having a convex upper surface,, prior to etching the trench. Such a BARC structure is shown to lead to etching without the formation of fencing and a clean dual damascene structure for subsequent coating. A directional, anisotropic etching of BARC, and more particularly, an ammonia plasma etch, is one convenient method of removing BARC and forming the desired convex upper surface.

BARC shaping for improved fabrication of dual damascene integrated circuit features

An integrated in situ etch process performed in a multichamber substrate processing system having first and second etching chambers. In one embodiment the first chamber includes an interior surface that has been roughened to at least 100 Rand the second chamber includes an interior surface that has a roughness of less than about 32 R. The process includes transferring a substrate having formed thereon in a downward direction a patterned photoresist mask, a dielectric layer, a barrier layer and a feature in the substrate to be contacted into the first chamber where the dielectric layer is etched in a process that encourages polymer formation over the roughened interior surface of the chamber. The substrate is then transferred from the first chamber to the second chamber under vacuum conditions and, in the second chamber, is exposed to a reactive plasma such as oxygen to strip away the photoresist mask deposited over the substrate. After the photoresist mask is stripped, the barrier layer is etched through to the feature to be contacted in the second chamber of the multichamber substrate processing system using a process that discourages polymer formation over the relatively smooth interior surface of the second chamber. All three etching steps are performed in a system level in situ process so that the substrate is not exposed to an ambient between steps. In some embodiments the interior surface of the first chamber has a roughness between 100 and 200 Rand in other embodiments the roughness of the first chamber's interior surface is between 110 and 160 R.

System level in-situ integrated dielectric etch process particularly useful for copper dual damascene

A method is provided for etching a dielectric structure. The dielectric structure comprises: (a) a layer of undoped silicon oxide or F-doped silicon oxide; and (b) a layer of C,H-doped silicon oxide. The dielectric structure is etched in a plasma-etching step, which plasma-etching step is conducted using a plasma source gas that comprises nitrogen atoms and fluorine atoms. As one example, the plasma source gas can comprise a gaseous species that comprises one or more nitrogen atoms and one or more fluorine atoms (e.g., NF). As another example, the plasma source gas can comprise (a) a gaseous species that comprises one or more nitrogen atoms (e.g., N) and (b) a gaseous species that comprises one or more fluorine atoms (e.g., a fluorocarbon gas such as CF). In this etching step, the layer of C,H-doped silicon oxide is preferentially etched relative to the layer of undoped silicon oxide or F-doped silicon oxide. The method of the present invention is applicable, for example, to dual damascene structures.

Process for selectively etching dielectric layers

The present invention provides a low-k dielectric etching process with high etching selectivities with respect to adjacent layers of other materials, such as an overlying photoresist mask and an underlying barrier/liner layer. The process comprises the step of exposing a portion of the low-k dielectric layer to a plasma of a process gas that includes a fluorocarbon gas, a nitrogen-containing gas, and an inert gas, wherein the volumetric flow ratio of inert:fluorocarbon gas is in the range of 20:1 to 100:1, and the volumetric flow ratio of fluorocarbon:nitrogen-containing gas is selected to provide a low-k dielectric to photoresist etching selectivity ratio greater than about 5:1 and a low-k dielectric etch rate higher than about 4000 &#x212b;/min.

Selective etching of low-k dielectrics

The present invention provides a novel etching technique for etching a layer of C-doped silicon oxide, such as a partially oxidized organo silane material. This technique, employing CH F /Ar chemistry at low bias and low to intermediate pressure, provides high etch selectivity to silicon oxide and improved selectivity to organic photoresist. Structures including a layer of partially oxidized organo silane material ( ) deposited on a layer of silicon oxide ( ) were etched according to the novel technique, forming relatively narrow trenches ( and ) and wider trenches ( and ). The technique is also suitable for forming dual damascene structures ( and ). In additional embodiments, manufacturing systems ( ) are provided for fabricating IC structures of the present invention. These systems include a controller ( ) that is adapted for interacting with a plurality of fabricating stations ( and ).

Etch process for dielectric materials comprising oxidized organo silane materials

A substrate is etched in a process zone by placing the substrate in the process zone, providing an energized process gas in the process zone, and exhausting the process gas. A first stage of the etching process is monitored to determine completion of the first stage by detecting the intensities of one or more wavelengths of a radiation emission generated by the energized gas, generating a first signal in relation to the detected intensities, and evaluating the first signal. A second stage of the etching process is monitored to determine completion of the second stage by detecting the intensities of one or more wavelengths of a polarized radiation reflected from the substrate being etched, generating a second signal in relation to the detected intensities, and evaluating the second signal.

Monitoring substrate processing with optical emission and polarized reflected radiation

Copper can be pattern etched in a manner which provides the desired feature dimension and integrity, at acceptable rates, and with selectivity over adjacent materials. To provide for feature integrity, the portion of the copper feature surface which has been etched to the desired dimensions and shape must be protected during the etching of adjacent feature surfaces. This is particularly important for feature sizes less than about 0.5 &mgr;m, where presence of even a limited amount of a corrosive agent can eat away a large portion of the feature. The copper feature integrity is protected by several different mechanisms: 1) The reactive etchant species are designed to be only moderately aggressive, so that an acceptable etch rate is achieved without loss of control over the feature profile or the etch surface; 2) Hydrogen is applied over the etch surface so that it is absorbed onto the etch surface, where it acts as a boundary which must be crossed by the reactive species and a chemical modulator for the reactive species; and 3) Process variables are adjusted so that byproducts from the etch reaction are rendered more volatile and easily removable from the etch surface. In an inductively coupled plasma etch chamber, we have observed that the preferred chlorine reactive species are generated when the chlorine is dissociated from compounds rather than furnished as Cl gas.

Method of heating a semiconductor substrate

Disclosed herein is a post-etch treatment for plasma etched metal-comprising features in semiconductor devices. The post-etch treatment significantly reduces or eliminates surface corrosion of the etched metal-comprising feature. It is particularly important to prevent the formation of moisture on the surface of the feature surface prior to an affirmative treatment to remove corrosion-causing contaminants from the feature surface. Avoidance of moisture formation is assisted by use of a high vacuum; use of an inert, moisture-free purge gas; and by maintaining the substrate at a sufficiently high temperature to volatilize moisture. The affirmative post-etch treatment utilizes a plasma to expose the etched metal-comprising feature to sufficient hydrogen which is in a kinetic state permitting reaction with residual halogen-comprising residues on the etched surface, while maintaining the etched feature surface at a temperature which supports volatilization of the byproducts of a reaction between the active hydrogen species and the halogen-comprising residues. For an etched copper surface, if moisture forms on the etched surface prior to an affirmative treatment to remove corrosion-causing contaminants, it is very important to avoid contact of the etched surface with pollutants which are capable of forming copper carbonates and/or copper sulfates.

Post-etch treatment of plasma-etched feature surfaces to prevent

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San Jose, CA, United States of America

Chang-Lin Hsieh