Taiwan Semiconductor Manufacturing Comp. Ltd.

Chang-Ching Yeh

Yu-Hsien Lin

A method includes forming a fin structure over a substrate; forming a gate structure over the substrate and crossing the fin structure, wherein the gate structures comprises a gate electrode and a hard mask layer over the gate electrode; forming gate spacers on opposite sidewalls of the gate structure; performing an ion implantation process to form doped regions in the hard mask layers of the gate structure and in the gate spacers, wherein the ion implantation process is performed at a tilt angle; etching portions of the fin structure exposed by the gate structure and the gate spacers to form recesses in the fin structure; and forming source/drain epitaxial structures in the recesses.

Integrated circuit structure and fabrication thereof

A method includes forming a fin structure extending above a substrate; forming dummy gate structures extending across the fin structure, each of the dummy gate structures including a dummy gate electrode layer and a hard mask layer over the dummy gate electrode layer; performing an ion implantation process to dope the hard mask layers of the dummy gate structures; after performing the ion implantation process to dope the hard mask layers of the dummy gate structures, performing a first etching process to etch a source/drain region of the fin structure between the dummy gate structures to form a recess in the source/drain region of the fin structure; forming an epitaxial structure in the recess; and replacing the dummy gate structures with metal gate structures.

Growing community of inventors

Taipei, Taiwan

Chang-Ching Yeh