Applied Materials, Inc.

Chan-Syun Yang

Jeffrey D Chinn

Meihua Shen

Changhun Lee

Oranna Yauw

An oxygen-free hydrogen plasma ashing process particularly useful for low-k dielectric materials based on hydrogenated silicon oxycarbide materials. The main ashing step includes exposing a previously etched dielectric layer to a plasma of hydrogen and optional nitrogen, a larger amount of water vapor, and a yet larger amount of argon or helium. Especially for porous low-k dielectrics, the main ashing plasma additionally contains a hydrocarbon gas such as methane. The main ashing may be preceded by a short surface treatment by a plasma of a hydrogen-containing reducing gas such as hydrogen and optional nitrogen.

Hydrogen ashing enhanced with water vapor and diluent gas

A method of forming a notch silicon-containing gate structure is disclosed. This method is particularly useful in forming a T-shaped silicon-containing gate structure. A silicon-containing gate layer is etched to a first desired depth using a plasma generated from a first source gas. During the etch, etch byproducts deposit on upper sidewalls of the silicon-containing gate layer which are exposed during etching, forming a first passivation layer which protects the upper silicon-containing gate layer sidewalls from etching during subsequent processing steps. A relatively high substrate bias power is used during this first etch step to ensure that the passivation layer adheres properly to the upper silicon-containing gate sidewalls. The remaining portion of the silicon-containing gate layer is etched at a lower bias power using a plasma generated from a second source gas which selectively etches the silicon-containing gate layer relative to the underlying gate dielectric layer, whereby a lower sidewall of the silicon-containing gate layer is formed and an upper surface of the gate dielectric layer is exposed. The etch stack is then exposed to a plasma generated from a third source gas which includes nitrogen, whereby a second, nitrogen-containing passivation layer is formed on the exposed sidewalls of the silicon-containing gate layer. Subsequently, a notch is etched in the lower sidewall of the silicon-containing gate layer. The method of the invention provides control over both the height and the width of the notch, while providing a marked improvement in notch critical dimension uniformity between isolated and dense feature areas of the substrate.

Growing community of inventors

Beverly Hills, CA, United States of America

Chan-Syun Yang