Sgs-Thomson Microelectronics S.r.l.

Stmicroelectronics S.r.l.

Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno

Consorzio Per La Ricerca Sulla Microelectronica Nel

Carmelo Magro

Paolo Lanza

Raffaele Zambrano

Giuseppe Ferla

Antonello Santangelo

Carmelo Oliveri

Guiseppe Ferla

The process provides first for the accomplishment of low-doping body regions at the sides and under a gate region and then the accomplishment of high-doping body regions inside said low-doping body regions and self-aligned with said gate region. There is thus obtained an MOS power transistor with vertical current flow which has high-doping body regions self-aligned with said gate region and with a reduced junction depth.

MOS transistors having vertical current flow

Method for forming MOS transistors having vertical current flow and

A metal semiconductor ohmic contact farming process consists of enrichment of the surface of the semiconductor on which contact is to be formed, by ion implantation of a dopant, followed by deposition of a metal film on the implanted surface and then by thermal annealing at a temperature lower than 500.degree. C. and for a period shorter than 60 minutes.

Metal-semiconductor ohmic contact forming process

A process for the manufacture of power-MOS semiconductor devices achieves high cell density by the use of self-aligning techniques and photographic exposure equipment of the stepper type. The process calls for definition and formation of the source by a complementary spacer technique and metallization of the source and gate contact areas by silicides after formation of spacers on the gate wall.

Process for the manufacture of power-MOS semiconductor devices

Along the outline of a first doped region, a first mask is formed. The mask is made up of a dielectric opposed to the oxygen diffusion. Another mask is created within this first mask, using a process of selective thermal oxidation. The second mask is used to implant dopant in a second region which will only be defined along the outlines of the first region.

Process for defining and forming an active region of very limited

The method consists of subjecting the semiconductor chips to chemical treatment with a silanizing agent immediately before testing to prevent superficial electrical discharges which can reduce the testing voltage which can be applied.

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Catania, Italy

Carmelo Magro