Intel Corporation

Carlos A Gonzalez

Biju Chandran

Leo Ofman

Song-Hua Shi

Lejun Wang

Milan Djukic

Glenn Ratificar

Kristopher J Frutschy

Charles A Gealer

High yield, high reliability, flip-chip integrated circuit (IC) packages are achieved utilizing a combination of heat and pressure to bond flip-chip die and to cure no-flow underfill material. The underfill comprises a filler or low coefficient of thermal expansion (CTE) material to decrease CTE of the cured underfill. The filler material can be selected from the group comprising silica, silicon oxide, silicon dioxide, silicon nitride, aluminum oxide, aluminum nitride, or a mixture thereof. The filler material may also increase the viscosity of the uncured underfill and/or increase the modulus of elasticity of the cured underfill. In some method embodiments, a thermocompression bonder is used to simultaneously provide solder bump reflow and underfill curing. Application of various methods to a component package, an electronic assembly, and an electronic system are also described.

Electronic assemblies and systems with filled no-flow underfill

Electronic assemblies with filled no-flow underfill

A chip-join process to reduce elongation mismatch between the adherents involves thermally expanding each of a coefficient of thermal expansion mismatched semiconductor chip and substrate a substantially equal amount from their room temperature state in a direction along surfaces thereof to be joined by soldering. The thermally expanded semiconductor chip and substrate are then soldered to one another forming a plurality of soldered joints, and then cooled to room temperature. The process enables elongation mismatch from soldering to be reduced to less than half that expected based up cooling the substrate and semiconductor chip from the solder solidification temperature following soldering, thereby reducing post soldering residual stress, residual plastic deformation in the soldered joints, residual plastic deformation in the substrate, and semiconductor chip warpage.

Chip-join process to reduce elongation mismatch between the adherents and semiconductor package made thereby

The present invention includes a mechanical joint between a die and a substrate that is reflowed by microwave energy and a method of forming such a mechanical joint by printing a solder over a substrate, placing the solder in contact with a bump over a die, reflowing the solder with microwave energy, and forming a mechanical joint from the solder and the bump.

Self-aligned mechanical joint between die and substrate exposed to mixed microwave energy

A low resistance package-to-die interconnect scheme for reduced die stresses includes a relatively low melting temperature and yield strength solder on the die and a relatively higher melting temperature and electrically conductive material such as copper on the substrate. A soldered joint connects the solder to the electrically conductive material to couple/connect the die and substrate to one another. The soldered joint is formed by heating the die and solder thereon to at least the melting temperature of the solder and thereafter contacting the molten solder with the conductive material on the substrate, which is at a substantially lower temperature for minimizing residual stress from soldering due to coefficient of thermal expansion mismatch between the substrate and die.

Method of interconnecting die and substrate

A thin, lightweight retention mechanism with a spring force holds an integrated circuit package to a circuit board. The retention mechanism consists of a pressure plate, a backing plate, and a fastening means for applying a deforming force to the plates, such as screws and nuts. The plates are paraboloid or dish-shaped and made of an elastically deformable material, such as steel. The fastening means simultaneously applies deforming forces to the peripheries of the plates to create a continuous spring force to effect electrical continuity between the integrated circuit package and the circuit board. In addition, a method of testing the retention mechanism and a method of assembling the retention mechanism are disclosed.

I/C package/thermal-solution retention mechanism with spring effect

I/C package/ thermal-solution retention mechanism with spring effect

An array of contacts for electrically connecting a semiconductor package to a circuit board. The contacts are carried by a tape having an adhesive border. The tape, along with the contacts, are applied easily to either the substrate or the circuit board using the adhesive border. Each contact is made of two S-shaped pieces in perpendicular directions. The contacts are inserted into holes in the tape and held there by friction.

Contact array for semiconductor package

A surface mount-type microelectronic component assembly which does not physically attach the microelectronic component to its carrier substrate. Electrical contact is achieved between the microelectronic component and the carrier with solder balls attached to either the microelectronic component or the carrier substrate. A force is exerted on the assembly to achieve sufficient electrical contact between the microelectronic component and the carrier substrate.

Direct BGA attachment without solder reflow

A ball grid array device includes a substrate and a die attached to the substrate. The substrate further includes a first major surface and a second major surface. A first ball, having an attached end and a distal tip end, is attached to a major surface of the substrate. The first ball has a first height. A second ball, having an attached end and a distal tip end, is also attached to the major surface. The second ball has a second height different from the first height. The first height and the second height are selected to produce a substantially co-planar surface at the distal tip ends of the first ball and the second ball. The major surface is not substantially co-planar. A method for forming the balls of a ball grid array device on a major of a substrate includes determining height differences across the major surface of the substrate, placing lands on the substrate, and forming a plurality of balls on the lands. Each of the balls has an attached portion and a tip portion. The balls are formed with varying heights so the tip portions of each of the plurality of balls define a substantially planar surface.

Variable pad diameter on the land side for improving the co-planarity of ball grid array packages

A retention module includes a socket to connect to a package. At least one retention arm is coupled to the socket. The at least one retention arm extends perpendicular to the socket. At least one retention clamp is coupled to the at least one retention arm to secure placement of a heat sink against a surface of a package assembly.

Package retention module coupled directly to a socket

I/C package / thermal-solution retention mechanism with spring effect

Solder reflow with microwave energy

A retention module includes a socket to connect to a package. At least one retention arm is coupled to the socket. At least one clamping bar is coupled to the at least one retention arm to secure placement of a heat sink against a surface of a package assembly.

Growing community of inventors

Chandler, AZ, United States of America

Carlos A Gonzalez