Siliconware Precision Industries Co., Ltd.

Candy Tien

Chien Ping Huang

Jeng-Yuan Lai

Kevin Chiang

Vicky Liu

Tom Tang

Eing-Chieh Chen

Ting-Ke Chai

Shiu-Tai Tzung

Jenq-Yuan Lai

A cavity-down ball grid array package includes a substrate having a through cavity provided therein. A heat sink is attached to the substrate and a semiconductor chip in the cavity is attached to the heat sink and electrically connected to the substrate. A ball grid array is on the substrate and on the semiconductor chip.

Cavity-down ball grid array package with semiconductor chip solder ball

A semiconductor package with an exposed heat spreader includes a substrate having a semiconductor chip adhered to a first surface of the substrate. The heat spreader includes an upper portion, a lower portion with an opening formed in the center for receiving the semiconductor chip, and a connecting portion for connecting the upper portion and the lower portion in a manner that the upper portion is raised to a height above the opening of the lower portion. The lower portion is formed with a plurality of positioning members outwardly extending from edges of the lower portion to prevent the heat spreader from being dislocated during a molding process, and further includes downward flutes formed on the periphery of the opening for enabling resin flow underneath the heat spreader. The upper portion of the heat spreader is exposed to an exterior of the semiconductor package to improve heat dissipation.

Semiconductor package having an exposed heat spreader

An integrated circuit package with a fully-exposed heat sink is provided. The integrated circuit package includes a substrate having a first side being formed with first conductive traces and a second side being formed with second conductive traces. At least one chip is mounted on the substrate and electrically connected to the first conductive traces. A plurality of solder balls are provided at the terminal ends of the second conductive traces to allow external connection of the chip. The fully-exposed heat sink is mounted on the substrate. The heat sink is formed with a plurality of supportive legs arranged in such a manner as to allow a bottom surface of the heat sink to be separated from the chip and a top surface of the heat sink to be tightly attached to a cavity in a mold used to form an encapsulant for enclosing the chip. A plurality of positioning tongues are formed on the heat sink for securing the heat sink in position when performing a molding process for forming the encapsulant. With this integrated circuit package, no jig is required in the assembly of the integrated circuit package. Moreover, since there is no need to use adhesives to adhere the supportive legs onto the substrate, the integrated circuit package would not suffer from delamination as in the case of the prior art. The fully-exposed heat sink allows an increased heat-dissipating efficient as compared to the prior art.

Semiconductor package having a heat sink with an exposed surface

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Taichung, Taiwan

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