Fuji Electric Co., Ltd.

C Andre T Salama

Naoto Fujishima

Akio Sugi

A method of manufacturing a semiconductor integrated circuit (IC) device that integrates a TLPM (trench lateral power MOSFET) and one or more planar semiconductor devices on a semiconductor substrate. In manufacturing the semiconductor IC device according to one embodiment, a trench etching forms a trench. A p-type body region, an n-type expanded drain region, and a thick oxide film are formed. A second trench etching deepens the trench. Gate oxide films and gate electrodes of the TLPM, an NMOSFET, and a PMOSFET are formed. P-type base regions of the TLPM and an NPN bipolar transistor are formed. An n-type source and drain region of the TLPM, and n-type diffusion regions of the NMOSFET and the NPN bipolar transistor are formed. P-type diffusion regions of the PMOSFET and the NPN bipolar transistor are formed. An interlayer oxide film, a contact electrode, and constituent metal electrodes are formed.

Method of manufacturing a semiconductor integrated circuit device

A trench-type lateral power MOSFET is manufactured by forming an n-type diffusion region, which will be a drift region, on a p-type substrate; selectively removing a part of substrate and a part of n-type diffusion region to form trenches; forming a gate oxide film of 0.05 &#x3bc;m in thickness in each trench; forming a polycrystalline silicon gate layer on gate oxide film; forming a p-type base region and an n-type diffusion region, which will be a source region, in the bottom of each trench; and forming an n-type diffusion region, which will be a drain region, in the surface portion of n-type diffusion region. The MOSFET has reduced device pitch, a reduced on-resistance per unit area and a simplified manufacturing process.

Trench-type MOSFET having a reduced device pitch and on-resistance

A semiconductor integrated circuit (IC) device that integrates a TLPM and one or more planar semiconductor devices on a semiconductor substrate and a method of manufacturing the semiconductor IC device. In manufacturing the semiconductor IC device according to one embodiment, a trench etching forms a trench. A p-type body region, an n-type expanded drain region, and a thick oxide film are formed. A second trench etching deepens the trench. Gate oxide films and gate electrodes of the TLPM, an NMOSFET, and a PMOSFET are formed. PLPM type base regions of the TLPN and an NPN bipolar transistor are formed. An n-type source and drain region of the TLPM, and n-type diffusion regions of the NMOSFET and the NPN bipolar transistor are formed. P-type diffusion regions of the PMOSFET and the NPN bipolar transistor are formed. An interlayer oxide film, a contact electrode, and constituent metal electrodes are formed.

Semiconductor integrated circuit device and method of manufacturing the same

A trench-type lateral power MOSFET is manufactured by forming an n -type diffusion region, which will be a drift region, on a p -type substrate; selectively removing a part of substrate and a part of n -type diffusion region to form trenches; forming a gate oxide film of 0.05 &mgr;m in thickness in each trench; forming a polycrystalline silicon gate layer on gate oxide film; forming a p -type base region and an n -type diffusion region, which will be a source region, in the bottom of each trench; and forming an n -type diffusion region, which will be a drain region, in the surface portion of n -type diffusion region. The MOSFET has reduced device pitch, a reduced on-resistance per unit area and a simplified manufacturing process.

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Toronto, Canada

C Andre T Salama