St Assembly Test Services Inc.

Amkor Technology, Inc.

Stats Chippac Pte. Ltd.

Byung Hoon Ahn

Byung Joon Han

Won Chul Do

Jae Hun Ku

Young Suk Chung

Sung Sik Jang

Suk Gu Ko

Young Nam Choi

Seng Guan Chow

Il Kwon Shim

Ming Ying

Byung Tai Do

Pandi Chelvam Marimuthu

Zheng Zheng

OhSug Kim

Metal leadframes, semiconductor packages made using the leadframes, and methods of making the leadframes and packages are disclosed. In one embodiment, the leadframe includes a rectangular frame. A chip pad and a plurality of leads are within the frame. The lower side of the chip pad and the leads includes one or more vertically recessed horizontal surfaces. The upper side of the chip pad may include a groove around a chip mounting region. In a package, the chip pad supports a semiconductor chip electrically connected to the leads. The lower side of the chip pad and leads are exposed at an exterior surface of the package body. Encapsulant material underfills the recessed lower surfaces of the chip pad and leads, thereby locking them to the encapsulant material. A wire may be reliably bonded to the chip pad within the groove formed in the upper side thereof.

Leadframe and semiconductor package made using the leadframe

An integrated circuit leadframe and a fabrication method for fabricating the integrated circuit leadframe include forming a leadframe having leads around a die pad that has a peripheral die pad rim. A discrete, alternately staggered surface configuration is formed in the die pad rim. The discrete, alternately staggered surface configuration creates space in the die pad for connecting and separating ground bond wire-bonds and down bond wire-bonds, and provides for locking encapsulant firmly to the die pad.

Integrated circuit leadframe and fabrication method therefor

A system is provided for an integrated circuit package including a leadframe with a lead finger. A groove is in a lead finger for a conductive bonding agent and a passive device is in the groove to be held by the conductive bonding agent.

Semiconductor package with passive device integration

An integrated circuit package system and method of manufacture therefor includes providing a substrate with a beveled cavity, attaching a down-set conductive die pad with tapered sidewalls for matching with the beveled cavity in the substrate and having the down-set below a lower surface of the substrate, and attaching an integrated circuit over the down-set conductive die pad and electrically connected thereto.

Integrated circuit package system with down-set die pad and method of manufacture thereof

A substrate is provided. A first die is attached to the substrate. The first die is electrically connected to the substrate. A heat sink having an undercut around its periphery is attached to the first die. A second die is attached to the heat sink. The second die is electrically connected to the substrate, and the first die, the heat sink, and the second die are encapsulated.

Thermally enhanced stacked die package and fabrication method

A leadframe for a semiconductor die includes signal leads, ground leads, and a die support holder for supporting the semiconductor die. The die support holder has opposite surfaces and side edges therebetween. The opposite die support holder surfaces are smaller in transverse extent than the semiconductor die for supporting the die on one of the opposite die support holder surfaces such that the die extends beyond the side edges of the die support holder.

Moisture resistant integrated circuit leadframe package

Semiconductor packages provide a leadframe for packages that are singulated with respective predetermined package body sizes. Individual mold caps are formed on the leadframe with mold cap dimensions that are larger than the respective predetermined package body sizes. The mold caps and leadframe are singulated to the respective predetermined package body sizes.

Semiconductor packages and leadframe assemblies

A leadframe for a semiconductor package includes signal and ground leads, a ground plane, and a frame paddle. Supports connect the signal and ground leads, ground plane, and frame paddle in at least two different layers. At least one force release and stress relief structure is incorporated into the leadframe to free the ground plane substantially from distortion and warpage resulting from residual mechanical stresses therein.

Integrated circuit leadframe with ground plane

A system is provided for an integrated circuit package including a leadframe having a lead finger. A groove is formed in a lead finger for a conductive bonding agent and a passive device is placed in the groove to be held by the conductive bonding agent.

A method for fabricating semiconductor packages provides a leadframe for packages that are to be singulated with respective predetermined package body sizes. Individual mold caps are formed on the leadframe with mold cap dimensions that are larger than the respective predetermined package body sizes. The mold caps and leadframe are sawed to singulate packages therefrom. The sawing reduces the dimensions of the mold caps to the respective predetermined package body sizes.

Growing community of inventors

Singapore, Singapore

Byung Hoon Ahn