Motorola Corporation

Bruce J Freyman

Barry M Miles

Frank J Juskey, Jr

Dale W Dorinski

John D Shurboff

Jill L Flaugher

Anthony B Suppelsa

William B Mullen, Iii

Glenn F Urbish

Lonnie L Bernardoni

Frank J Juskey

Marc V Papageorge

John R Thome

Keith D Soldner

Kurt C Conrath

Nicolaas H Worp

An integrated circuit package includes a stacked integrated circuit chip arrangement (140) placed on a circuit substrate. The stacked IC chip arrangement includes a first IC chip (110) and a second IC chip (120), each having an array of terminals (116, 126) and being positioned in a face-to-face manner. An interposed substrate (130) is positioned between the first IC chip (110) and the second IC chip (120) such that circuitry disposed on the interposed substrate (130) provides electrical connection among the arrays of terminals of the first IC chip (110) and the second IC chip (120) and external circuitry.

Integrated circuit package having a face-to-face IC chip arrangement

An integrated circuit package (10) comprises a semiconductor die (14) having a top surface and a bottom surface, and a substrate (16) for receiving the semiconductor die. The substrate should have an aperture(s) (18) below the semiconductor die for providing moisture relief during temperature excursions. An adhesive (20) applied to the substrate allows for mounting the semiconductor die to the substrate. Then, the semiconductor die is wirebonded to the substrate. Finally, an encapsulant (12) for sealing the top surface of the semiconductor die is formed over the semiconductor die and portions of the substrate.

Moisture relief for chip carrier

A leadless pad array chip carrier package is disclosed, employing a printed circuit board (22) having an array of solder pads (34) on the bottom side. A semiconductor device (24) is electrically wire bonded (49) and attached with conductive adhesive (47) to the metallization patterns (43, 25) of the printed circuit board (22). A protective plastic cover (26) is transfer molded about the semiconductor device (24) covering substantially all of the top side of the printed circuit board (22).

Leadless pad array chip carrier

A method of making a pad array chip carrier package is disclosed. A semiconductor device (10) is bonded to a ceramic substrate (12). The semiconductor device may be attached to the substrate by wirebonding, tab bonding or flip chip bonding. The bonded assembly (16) is then attached to a flexible temporary support substrate (18) by means of an adhesive (19). The entire assembly is then placed into a mold cavity (20 and 22) and registered against the temporary support substrate (18). Plastic material (30) is molded about the semiconductor device and associated wirebonds in order to encapsulate the device. After removal from the mold, the encapsulated assembly is removed from the temporary support substrate (18) by peeling the temporary support substrate (18) from the circuit substrate.

Method of making a transfer molded semiconductor device

A shielded semiconductor package and a method for manufacturing the package is provided. The shielded semiconductor package comprises a substrate (10) having a metallization pattern (12, 13), with one portion of the metallization pattern being a circuit ground (13). A semiconductor device (16) is electrically interconnected (17) to the metallization pattern (12). A perforated metal shield or screen (18) covers the semiconductor device (16) and is electrically and mechanically attached to the metallization circuit ground (13) in order to shield the semiconductor device (16) from radio frequency energy. A resin material (14) is transfer molded about the semiconductor device, the electrical interconnections, and the metal screen to form the completed package.

Transfer molded semiconductor device package with integral shield

An overmolded semiconductor package (150) is formed by electrically and mechanically attaching a semiconductor device (100) to a substrate (110) having at least one hole (130). A plastic molding compound (140) is overmolded around the semiconductor device 100) so as to encapsulate the device, the molding compound (140) extending at least partially into the substrate hole (130) to form an anchor (135) to aid in bonding the molding compound to the substrate. An alternate embodiment of the invention forms a pedestal (449) from the portion of the molding compound extending beyond the surface of the substrate. The pedestal functions as an anchor to aid in bonding the molding compound (440) to the substrate, and also as a spacer to maintain a preselected clearance between the substrate (410) and the printed circuit board (460). The portion of the molding compound extending beyond the surface of the substrate may also be used to form an alignment pin (548). The pin functions as an anchor to aid in bonding the molding compound to the substrate, and also as an alignment aid to maintain positional relationships between the substrate and the printed circuit board. In another embodiment of the invention, the overmolded semiconductor is mounted directly on a printed circuit board containing other active circuitry.

Overmolded semiconductor package with anchoring means

A flexible film is made into a substrate (100) having metallization patterns. A semiconductor device (106) is affixed to the substrate, and the assembly is heated to expand the substrate. A cover (110) is attached to the substrate, over the device (106). Upon cooling, the substrate (100) shrinks and becomes taut and planar within the reinforced area. Alternatively, a reinforcing ring (210) can be attached to the substrate (200) either before or after attachment of the semiconductor device (206).

Flexible film chip carrier having a flexible film substrate and means

A die pad (108) with a punched hole providing a throughway (110) is affixed upon the chip carrier base 100. Such throughway permits the electronic interconnection of the die backside (112) to a conductive runner (104) by electrically conductive material (110) set between the die backside (112) and the conductive runner (104).

Grounding an ultra high density pad array chip carrier

A method of manufacturing a chip carrier from a universal ceramic substrate provides for a universal ceramic substrate having first and second opposed sides and an array of conductively filled through-holes. On the first side, wire bond pads and conductors connected to the conductively filled through-holes are provided as required. Similarly, on the second side, solder pads on the conductively filled through-holes are provided as required. Finally, at least one insulating layer is provided over part of the first side for die attachment.

Fabrication of pad array carriers from a universal interconnect structure

An ultra high density pad array chip carrier is disclosed which includes a ceramic substrate having a plurality of electrical conductors each of which connect to a respective through-hole plugged with solder on its bottom surface. These solder plugs form a pad array for the chip carrier as well as provide a hermetic seal for the ceramic substrate. A polymer dielectric layer is affixed to the top surface of the ceramic substrate which provides an insulated metal die mount pad thereon. The electrical conductors on the ceramic substrate are formed using well-known vacuum metallization techniques to achieve much narrower widths. Approximately a 40 percent reduction in overall size and cost is achieved utilizing this improved arrangement, which improves reliability and facilitates post-assembly cleaning of the chip carrier when mounted to its final board.

Growing community of inventors

Plantation, FL, United States of America

Bruce J Freyman