Intel Corporation

Bohan Shan

Jeremy D Ecton

Omkar G Karhade

Brandon C Marin

Gang Duan

Suddhasattwa Nad

Dingying David Xu

Hongxia Feng

Haobo Chen

Srinivas V Pietambaram

Kristof Darmawikarta

Zhiguo Qian

Yonggang Li

Leonel R Arana

Tarek A Ibrahim

Xavier Francois Brun

Sri Chaitra Jyotsna Chavali

Xiaoying Guo

Bai Nie

Kyle Jordan Arrington

Jung Kyu Han

Jason M Gamba

Marcel Arlan Wall

Srinivas Venkata Ramanuja Pietambaram

Jieying Kong

Yue Deng

Sarah Blythe

Wei Wei

Xiaoxuan Sun

Santosh Tripathi

Yiyang Zhou

Jason Steill

Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first die, having a first surface and an opposing second surface, in a first layer; a redistribution layer (RDL) on the first layer, wherein the RDL includes conductive vias having a greater width towards a first surface of the RDL and a smaller width towards an opposing second surface of the RDL; wherein the first surface of the RDL is electrically coupled to the second surface of the first die by first solder interconnects having a first solder; and a second die in a second layer on the RDL, wherein the second die is electrically coupled to the RDL by second solder interconnects having a second solder, wherein the second solder is different than the first solder.

Microelectronic assemblies including interconnects with different solder materials

Various embodiments disclosed relate to methods of making omni-directional semiconductor interconnect bridges. The present disclosure includes semiconductor assemblies including a mold layer having mold material, a first filler material dispersed in the mold material, and a second filler material dispersed in the mold material, wherein the second filler material is heterogeneously dispersed.

Omni directional interconnect with magnetic fillers in mold matrix

Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.

Microelectronic structures including bridges

An integrated circuit (IC) package substrate, comprising a metallization level within a dielectric material. The metallization level comprises a plurality of conductive features, each having a top surface and a sidewall surface. The top surface of a first conductive feature of the plurality of conductive features has a first average surface roughness, and the sidewall surface of a second conductive feature of the plurality of conductive features has a second average surface roughness that is less than the first average surface roughness.

Selectively roughened copper architectures for low insertion loss conductive features

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Chandler, AZ, United States of America

Bohan Shan