Western Digital Technologies, Inc.

Bo Yang

Ning Ye

Yangming Liu

Shenghua Huang

Shrikar Bhagath

Warren Middlekauff

Chun Sean Lau

Cong Zhang

Shankara Venkatraman Gopalan

Yuhang Yang

Ahmad Faridzul Hilmi Shamsuddin

Sean Lau

A semiconductor device includes a substrate, semiconductor dies on the substrate, molding compound and a reinforcing layer suspended within the molding compound. The reinforcing layer may for example be a copper foil formed in the molding compound over the semiconductor dies during the compression molding process. The reinforcing layer may have a structural rigidity which provides additional strength to the semiconductor device. The reinforcing layer may also be formed of a thermal conductor to draw heat away from a controller die within the semiconductor device.

Semiconductor device including a suspended reinforcing layer and method of manufacturing same

A protective enclosure for a PCB assembly, e.g., a solid-state-drive assembly. In an example embodiment, the enclosure comprises a flexible, stamped-metal heat spreader connected, by way of cured-liquid TIM parts, to at least some of the packaged integrated circuits on one side of the PCB assembly. In some embodiments, additional cured-liquid TIM parts may be connected between the body of the protective enclosure and packaged integrated circuits on the other side of the PCB assembly and/or the assembly's PCB. The PCB assembly, heat spreader, and various TIM parts are arranged in a manner that helps to significantly lower the risk of solder-joint failure under thermal cycling.

Protective enclosure for an electronic device

A data storage device includes an enclosure and a Printed Circuit Board Assembly (PCBA) extending in a basal plane, and a plurality of semiconductor memory packages electromechanically bonded to the PCBA and coupled to the enclosure with thermal interface material. The data storage device further includes a first fitting coupled to a first end of the PCBA and the enclosure, restricting movement of the PCBA in the basal plane with respect to the enclosure and restricting movement of the PCBA out of the basal plane. The data storage device further includes a second fitting coupled to a second end of the PCBA, allowing movement of the PCBA in the basal plane with respect to the enclosure and restricting movement of the PCBA out of the basal plane.

Enclosure fitting for electronic device

The present disclosure generally relates to a flip chip assembly having a bump that reduces stress levels in a low-k dielectric layer in the flip chip. Rather than having a single, large area plateau that interfaces with a large corresponding opening of an insulating layer in the flip chip, the bump includes a plurality of much smaller pillars that interface with a corresponding plurality of openings in the insulating layer. In so doing, the low-k layer within the flip chip experiences much less stress and hence, fewer failures.

Flip chip bump with multi-PI opening

A semiconductor device package includes a substrate having a top planar surface and a first semiconductor die electrically connected to the top planar surface of the substrate. The first semiconductor die and substrate define a tunnel and a first molding compound encapsulates the first semiconductor die and fills the tunnel. A second molding compound that is separate and distinct from the first molding compound is mounted on a top surface of the first molding compound. The first molding, when in a flowable state, has a viscosity that is lower than a viscosity of the second molding compound when it is in a flowable state.

Semiconductor device package having multi-layer molding compound and method

Disclosed herein is an electronic device that includes a pedestal that extends from a mounting surface of a base of the electronic device. The electronic device also includes a thermal interface material that is interposed between an interface surface of the pedestal and a data processing component, is in direct contact with the data processing component, and is in direct contact with a first portion and a second portion of the interface surface. The first portion of the interface surface of the pedestal has a first height, relative to the mounting surface of the base, and the second portion of the interface surface of the pedestal has a second height, relative to the mounting surface of the base and different than the first height.

Electronic device with heat transfer pedestal having optimized interface surface and associated methods

A packaged semiconductor device includes a substrate, a heat-generating component positioned on a surface of the substrate, an enclosure at least partially surrounding the substrate and the heat-generating component, and a thermal interface material disposed between the heat-generating component and the enclosure. The enclosure includes a cover portion having a convexly curved surface configured to apply a pressure to the thermal interface material. The pressure may be substantially uniform over the area of the thermal interface material, or may be higher at a center of the thermal interface material than at a periphery of the thermal interface material.

Semiconductor device package having cover portion with curved surface profile

A semiconductor device is disclosed including one or more semiconductor dies mounted on substrate. Each semiconductor die may be formed with a ferromagnetic layer on a lower, inactive surface of the semiconductor die. The ferromagnetic layer pulls the semiconductor dies down against each other and the substrate during fabrication to prevent warping of the dies. The ferromagnetic layer also balances out a mismatch of coefficients of thermal expansion between layers of the dies, thus further preventing warping of the dies.

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Milpitas, CA, United States of America

Bo Yang