Samsung Electronics Co., Ltd.

Bo-Wo Choi

Yong-Sun Ko

Yoonyoung Choi

Seung-Ho Lee

Seungjin Kim

Woo-Gwan Shim

In-seak Hwang

Tae-Kyu Kim

Byung-Hyun Lee

Keum-Joo Lee

Heesook Cheon

Hyun-Sil Hong

Sang-jine Park

A substrate processing apparatus includes: a spin chuck, on which a substrate is mounted, the spin chuck rotating the substrate; At least one of a chemical liquid nozzle configured to provide a chemical liquid to a surface of the substrate and a deionzed water nozzle configured to provide a deionized water to a surface of the substrate; and a laser device configured to emit a pulse waver laser beam having a period of 10seconds or less for etching an edge of the substrate.

Substrate processing apparatus

A method of fabricating a semiconductor device including preparing a substrate including a wafer inner region and a wafer edge region, the wafer inner region including a chip region and a scribe lane region, sequentially stacking a mold layer and a supporting layer on the substrate, forming a first mask layer on the supporting layer, the first mask layer including a first stepped region on the wafer edge region, forming a step-difference compensation pattern on the first stepped region, forming a second mask pattern including openings, on the first mask layer and the step-difference compensation pattern, and sequentially etching the first mask layer, the supporting layer, and the mold layer using the second mask pattern as an etch mask to form a plurality of holes in at least the mold layer may be provided.

Method of fabricating a semiconductor device

A method of fabricating a semiconductor device includes forming a mask pattern on an active region of a substrate defined by an isolation region. The mask pattern includes an opening therein exposing a portion of the active region. The exposed portion of the active region is etched to define a preliminary gate trench therein including opposing sidewalls and a surface therebetween, where portions of the mask pattern extend to edges of the active region outside the preliminary gate trench. An annealing process is performed on the substrate to form a gate trench from the preliminary gate trench, and gate electrode is formed in the gate trench. The preliminary gate trench and the gate trench have a substantially similar width defined between the edges of the active region including the portions of the mask pattern thereon.

Methods of fabricating recessed channel metal oxide semiconductor (MOS) transistors

Growing community of inventors

Suwon-si, South Korea

Bo-Wo Choi