Amkor Technology, Inc.

Blake A Gillett

Sean Timothy Crowley

Keith M Edwards

Bradley D Boland

Thomas P Glenn

Philip S Mauri

Victor M Aquino, Jr

Ferdinand E Belmonte

Remigio V Burro, Jr

A semiconductor package comprising a leadframe which includes a die paddle having an opening formed therein. In addition to the die paddle, the leadframe includes a plurality of leads, at least one of which is disposed in spaced relation to the die paddle. The remaining leads are attached to the die paddle and extend therefrom. Electrically connected to the die paddle is the source terminal of a semiconductor die which also includes a gate terminal and a drain terminal. The gate terminal is itself electrically connected to the at least one of the leads disposed in spaced relation to the die paddle. A package body at least partially encapsulates the die paddle, the leads, and the semiconductor die such that portions of the leads and the drain terminal of the semiconductor die are exposed in the package body.

Method of making a leadframe for semiconductor devices

Leadframe package for semiconductor devices

A two-lead, surface-mounting, high-power micro-leadframe semiconductor package has the same outline, mounting, and electrical functionality as industry standard leadframe packages but provides a lower internal resistance, a higher package power rating, and costs less to produce. The novel package incorporates one of a rectangular array of &ldquo;micro-leadframes&rdquo; (&ldquo;MLFs&rdquo;), each having parallel and respectively coplanar upper and lower surfaces etched in a plate having a uniform thickness. Each micro-leadframe includes an I-shaped die pad having a head, a foot, and opposite sides. First and second leads are disposed at the foot of the die pad, each having a side aligned with one of the sides of the pad. The second lead has an right-angled wire-bonding pad next to the die pad. A portion of a lower surface of each of the die pad and the leads is exposed through a lower surface of an envelope of plastic molded on the package to define package input/output terminals.

Making two lead surface mounting high power microleadframe semiconductor packages

Semiconductor devices and methods of forming such devices are disclosed. The devices include a package allowing for increased thermal dissipation. In one embodiment, the device includes a power MOSFET die that is electrically connected to a portion of the substrate with a metal strap. The die and at least portions of the strap and substrate are encapsulated in an insulative encapsulant, such as molded plastic. A top surface of the strap is exposed to the environment through the encapsulant. The exposed surface may have grooves formed therein, or fins formed thereon, to facilitate heat transfer.

Method of making a semiconductor package having exposed metal strap

A semiconductor device is disclosed that includes a semiconductor die, a metal leadframe, and a metal strap. A bottom surface of the semiconductor device is on and electrically coupled to a first portion of the leadframe. A first end portion of the metal strap is on and electrically coupled to a top surface of the semiconductor die. An opposite, second end portion of the metal strap is on and electrically coupled to a second portion of the leadframe within a recess of the second portion of the leadframe.

Semiconductor device including metal strap electrically coupled between semiconductor die and metal leadframe

A semiconductor device includes include a package allowing for increased thermal dissipation. The device includes a power MOSFET die that is electrically connected to a portion of the substrate with a metal strap. The die and at least portions of the strap and substrate are encapsulated in an insulative encapsulant, such as molded plastic. A top surface of the strap is exposed to the environment through the encapsulant. The exposed surface may have grooves formed therein, or fins formed thereon, to facilitate heat transfer.

Exposed copper strap in a semiconductor package

The invention provides a method and apparatus for electrically connecting the die of a high power semiconductor device to a substrate with a conductive strap such that the connection is resistant to the shear stresses resulting with changes in temperature. In one embodiment, the method includes providing a substrate having first and second portions that are electrically isolated from each other. A semiconductor die having top and bottom surfaces and one or more active electronic devices formed therein is also provided. The device has a first terminal connected to a first conductive layer on the bottom surface of the die, and a second terminal connected to a second conductive layer on the top surface of the die. The first conductive layer is electrically coupled to a top surface of the first portion of the substrate. The second conductive layer is electrically coupled to the second portion of the substrate with a metal strap.

Growing community of inventors

Gilbert, AZ, United States of America

Blake A Gillett