Applied Materials, Inc.

Biagio Gallo

Kartik Ramaswamy

Hiroji Hanawa

Kenneth S Collins

Andrew Nguyen

Amir Hamed Al-Bayati

Abhilash J Mayur

Dean C Jennings

Vijay Parihar

Kai Ma

Gonzalo Monroy

Majeed Foad

Shijian Li

Seon-Mee Cho

Jonathon Simmons

Dongwon Choi

David Eugene Aberle

Dan Maydan

Peter I Porshnev

Martin A Hilkene

Matthew D Scotney-Castle

Rick J Roberts

Peter T Kindersley

Kartik Santhanam

Dong Hyung Lee

Ken MacWilliams

Dennis W Wagner

Randir P S Thakur

The disclosure concerns a process ring for the wafer support pedestal of a toroidal source plasma immersion ion implantation reactor. The process ring improves edge uniformity by providing a continuous surface extending beyond the wafer edge, in one embodiment. In another embodiment, the process ring includes a floating electrode that functions as an extension of the wafer support electrode by RF coupling at the bias frequency.

Plasma immersion ion implantation reactor with extended cathode process ring

Plasma immersion ion implantation employing a very high RF bias voltage on an electrostatic chuck to attain a requisite implant depth profile is carried out by first depositing a partially conductive silicon-containing seasoning layer over the interior chamber surfaces prior to wafer introduction.

Plasma immersion ion implantation method using a pure or nearly pure silicon seasoning layer on the chamber interior surfaces

A method and apparatus for removing excess dopant from a doped substrate is provided. In one embodiment, a substrate is doped by surfaced deposition of dopant followed by formation of a capping layer and thermal diffusion drive-in. A reactive etchant mixture is provided to the process chamber, with optional plasma, to etch away the capping layer and form volatile compounds by reacting with excess dopant. In another embodiment, a substrate is doped by energetic implantation of dopant. A reactive gas mixture is provided to the process chamber, with optional plasma, to remove excess dopant adsorbed on the surface and high-concentration dopant near the surface by reacting with the dopant to form volatile compounds. The reactive gas mixture may be provided during thermal treatment, or it may be provided before or after at temperatures different from the thermal treatment temperature. The volatile compounds are removed. Substrates so treated do not form toxic compounds when stored or transported outside process equipment.

Removal of surface dopants from a substrate

Methods for implanting ions into a substrate by a plasma immersion ion implanting process are provided. In one embodiment, the method for implanting ions into a substrate by a plasma immersion ion implantation process includes providing a substrate into a processing chamber, supplying a gas mixture including a reacting gas and a reducing gas into the chamber, and implanting ions from the gas mixture into the substrate. In another embodiment, the method includes providing a substrate into a processing chamber, supplying a gas mixture including reacting gas and a hydrogen containing reducing gas into the chamber, and implanting ions from the gas mixture into the substrate.

Plasma immersed ion implantation process

A method for ion implanting a species into a surface layer of a workpiece in a chamber includes placing the workpiece in a processing zone of the chamber bounded by a chamber side wall and a chamber ceiling facing said workpiece and between a pair of ports of the chamber near generally opposite sides to the processing zone and connected together by a conduit external of the chamber. The method further includes introducing into the chamber a process gas comprising the species to be implanted, and further generating from the process gas a plasma current and causing the plasma current to oscillate in a circulatory reentrant path comprising the conduit and the processing zone.

Plasma immersion ion implantation process using a plasma source having low dissociation and low minimum plasma voltage

A method of measuring ion dose in a plasma immersion ion implantation reactor during ion implantation of a selected species into a workpiece includes placing the workpiece on a pedestal in the reactor and feeding into the reactor a process gas comprising a species to be implanted into the workpiece, and then coupling RF plasma source power to a plasma in the reactor. It further includes coupling RF bias power to the workpiece by an RF bias power generator that is coupled to the workpiece through a bias feedpoint of the reactor and measuring RF current at the feedpoint to generate a current-related value, and then integrating the current-related over time to produce an ion implantation dose-related value.

RF measurement feedback control and diagnostics for a plasma immersion ion implantation reactor

A process for conformally doping through the vertical and horizontal surfaces of a 3-dimensional vertical transistor in a semiconductor-on-insulator structure employs an RF oscillating torroidal plasma current to perform either conformal ion implantation, or conformal deposition of a dopant-containing film which can then be heated to drive the dopants into the transistor. Some embodiments employ both conformal ion implantation and conformal deposition of dopant containing films, and in those embodiments in which the dopant containing film is a pure dopant, the ion implantation and film deposition can be performed simultaneously.

Semiconductor on insulator vertical transistor fabrication and doping process

A method of processing a workpiece includes placing the workpiece on a workpiece support pedestal in a main chamber with a gas distribution showerhead, introducing a process gas into a remote plasma source chamber and generating a plasma in the remote plasma source chamber, transporting plasma-generated species from the remote plasma source chamber to the gas distribution showerhead so as to distribute the plasma-generated species into the main chamber through the gas distribution showerhead, and applying plasma RF power into the main chamber.

Plasma immersion ion implantation process

A valve system having high maximum gas flow rate and fine control of gas flow rate, includes a valve housing for blocking gas flow through a gas flow path, a large area opening through said housing having a first arcuate side wall and a small area opening through said housing having a second arcuate side wall, and respective large area and small area rotatable valve flaps in said large area and small area openings, respectively, and having arcuate edges congruent with said first and second arcuate side walls, respectively and defining therebetween respective first and second valve gaps. The first and second valve gaps are sufficiently small to block flow of a gas on one side of said valve housing up to a predetermined pressure limit, thereby obviating any need for O-rings.

O-ringless tandem throttle valve for a plasma reactor chamber

A method of processing a thin film structure on a semiconductor substrate using an optically writable mask, the method includes placing the substrate in a reactor chamber, the substrate having on its surface a target layer to be exposed to a light source in accordance with a predetermined pattern, depositing an optically writable carbon-containing mask layer on the substrate by (a) introducing a carbon-containing process gas into the chamber, (b) generating a reentrant toroidal RF plasma current in a reentrant path that includes a process zone overlying the workpiece by coupling plasma RF source power to an external portion of the reentrant path, (c) coupling RF plasma bias power or bias voltage to the workpiece. The method further includes optically writing on the carbon-containing mask layer in accordance with the predetermined pattern with writing light of a characteristic suitable for transforming the transparency or opacity of the optically writable mask layer and exposing through the mask layer the target layer with reading light of a characteristic different from that of the writing light.

Semiconductor substrate process using an optically writable carbon-containing mask

A method of processing a workpiece includes introducing an optical absorber material precursor gas into a chamber containing the workpiece, generating an RF oscillating toroidal plasma current in a reentrant path that includes a process zone overlying the workpiece by applying RF source power, so as to deposit a layer of an optical absorber material on the workpiece, and exposing the workpiece to optical radiation that is at least partially absorbed in the optical absorber layer.

Process for low temperature plasma deposition of an optical absorption layer and high speed optical annealing

Device-enhancing coatings are deposited on CMOS devices by successively masking with photoresist each one of the sets of N-channel and P-channel devices while unmasking or leaving unmasked the other set, and after each step of successively masking one of the sets of devices, carrying out low temperature CVD steps with a toroidal RF plasma current while applying an RF plasma bias voltage. The temperature of the workpiece is held below a threshold photoresist removal temperature. The RF bias voltage is held at a level at which the coating is deposited with a first stress when the unmasked set consists of the P-channel devices and with a second stress when the unmasked set consists of N-channel devices.

Low temperature CVD process with selected stress of the CVD layer on CMOS devices

A method of forming a conductor in a thin film structure on a semiconductor substrate includes forming high aspect ratio openings in a base layer having vertical side walls, depositing a dielectric barrier layer comprising a dielectric compound of a barrier metal on the surfaces of the high aspect ratio openings including the vertical side walls, depositing a metal barrier layer comprising the barrier metal on the first barrier layer, depositing a main conductor species seed layer on the metal barrier layer and depositing a main conductor layer. The method further includes annealing the main conductor layer by (a) directing light from an array of continuous wave lasers into a line of light extending at least partially across the thin film structure, and (b) translating the line of light relative to the thin film structure in a direction transverse to the line of light. The method of Claimfurther comprising, prior to the annealing step, depositing an amorphous carbon optical absorber layer on the main conductor layer. The step of depositing an amorphous carbon optical absorber layer includes introducing a carbon-containing process gas into a reactor chamber containing the substrate in a process zone of the reactor, applying RF source power to an external reentrant conduit of the reactor to generate a reentrant toroidal RF plasma current passing through the process zone and applying a bias voltage to the substrate.

Copper conductor annealing process employing high speed optical annealing with a low temperature-deposited optical absorber layer

A method of processing a thin film structure on a semiconductor substrate using an optically writable mask includes placing the substrate in a reactor chamber, the substrate having on its surface a target layer to be etched in accordance with a predetermined pattern, and depositing a carbon-containing hard mask layer on the substrate by (a) introducing a carbon-containing process gas into the chamber, (b) generating a reentrant toroidal RF plasma current in a reentrant path that includes a process zone overlying the workpiece by coupling plasma RF source power to an external portion of the reentrant path, and (c) coupling RF plasma bias power or bias voltage to the workpiece. The method further includes photolithographically defining the predetermined pattern in the carbon-containing hard mask layer, and etching the target layer in the presence of the hard mask layer.

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Los Gatos, CA, United States of America

Biagio Gallo