Taiwan Semiconductor Manufacturing Comp. Ltd.

Bi-Ming Yen

Ping-Jung Huang

Tsai-Chun Li

Ying Ting Hsia

Nai-Chia Chen

Jui-Ming Shih

Hung-Lung Hu

Tsung-Min Chuo

Jieh-Chau Huang

Pei Yen Hsia

Chun-Han Chu

Chun-Hung Lee

De-Fang Chen

Chun-Ming Hu

Chun-Liang Tai

Syun-Ming Jang Jang

Chao-Cheng Chen

Ming-Hsi Yeh

Yih-Ann Lin

Chung-Wei Chang

Bo-Wei Chou

Chin-Ming Lin

Pi-Chun Yu

Peng Shen

Embodiments of the present disclosure relates to a wet bench processing including an in-situ pre-treatment prior to performing the first set of wet bench operations. The pre-treatment may include a pre-clean operation and/or a pre-heat operation. The pre-treatment may be performed in one of the existing ONB tanks without requiring adding new tanks to an existing wet bench tool. The pre-clean operation removes particles from a batch of wafers to avoid or reduce cross-contamination and defect issues, thus improving the yield rate of the wet bench process. The pre-heat operation provides better control and stabilize the temperature in the CHB tank to stabilize the process, such as to stabilize an etch rate.

Wet bench process with in-situ pre-treatment operation

The present disclosure describes an apparatus for wafer cleaning. The apparatus includes an enclosure made of a noncombustible material, a wafer holder, a cleaning nozzle, at least one sensor, and an exhaust unit. The wafer holder can hold and heat a wafer. The cleaning nozzle can supply a flow of a cleaning fluid onto a surface of the wafer. The at least one sensor can detect attributes of the wafer. The exhaust unit can expel a vapor generated by the cleaning fluid in the enclosure. The exhaust unit can include a rinse nozzle to rinse the vapor passing through the exhaust unit with a mist.

Wafer cleaning apparatus and method

The present disclosure relates to an apparatus for wafer cleaning. The apparatus includes an enclosure made of a noncombustible material, a wafer holder, a cleaning nozzle, at least one sensor, and an exhaust unit. The wafer holder can hold and heat a wafer. The cleaning nozzle can supply a flow of a cleaning fluid onto a surface of the wafer. The at least one sensor can detect attributes of the wafer. The exhaust unit can expel a vapor generated by the cleaning fluid in the enclosure. The exhaust unit can include a rinse nozzle to rinse the vapor passing through the exhaust unit with a mist.

An embodiment method includes forming a patterned etch mask over a target layer and patterning the target layer using the patterned etch mask as a mask to form a patterned target layer. The method further includes performing a first cleaning process on the patterned etch mask and the patterned target layer, the first cleaning process including a first solution. The method additionally includes performing a second cleaning process to remove the patterned etch mask and form an exposed patterned target layer, the second cleaning process including a second solution. The method also includes performing a third cleaning process on the exposed patterned target layer, and performing a fourth cleaning process on the exposed patterned target layer, the fourth cleaning process comprising the first solution.

Method of removing an etch mask

Systems and methods are provided for forming features through photolithography. A polymer layer is formed over a substrate. The polymer layer is patterned to form a first feature and a second feature, the first feature and the second feature being separated at a first distance. A rinse material is applied to the polymer layer including the first feature and the second feature. The rinse material is removed from the polymer layer including the first feature and the second feature to cause the first feature and the second feature to come into contact with each other. A third feature is formed based on the first feature and the second feature being in contact with each other.

Multi-line width pattern created using photolithography

A method includes providing a semiconductor substrate; forming a doping oxide layer on the semiconductor substrate; forming a patterning layer on the doping oxide layer, the patterning layer leaving exposed regions of the doping oxide layer; performing a sputtering process to the substrate; and after the sputtering process, performing a wet etching process to the semiconductor substrate to remove the doping oxide layer from the exposed regions.

Etching process

A method of forming a semiconductor device includes forming a dielectric layer over a substrate. The method includes forming a layer set over the dielectric layer, wherein the layer set comprises a plurality of layers. The method further includes forming a bottom antireflective coating (BARC) layer over the layer set. The method further includes etching the layer set to form a tapered opening in the layer set, wherein etching the layer set comprises etching at least one layer comprising a silicon-rich photoresist material layer and a second material layer different from the silicon-rich photoresist material, and the tapered opening has sidewalls at an angle with respect to a top surface of the dielectric layer. The method further includes etching the dielectric layer using the layer set as a mask to form an opening in the dielectric layer, wherein etching the dielectric layer comprises reducing a thickness of the layer set.

Method of making a semiconductor device using a barrier and antireflective coating (BARC) layer

A method of making a semiconductor device includes forming an intermediate semiconductor device. The intermediate device includes a substrate; and a dielectric layer over the substrate. The intermediate device includes a first layer set, including a silicon-rich photoresist material, over the dielectric layer. The intermediate device includes a second layer set, including a carbon-rich organic material layer, over the first layer set. The method further includes etching the second layer set to form a tapered opening in the second layer set. The method further includes etching the first layer set to form an opening in the first layer set, wherein etching the first layer set comprises removing the carbon-rich organic material layer. The method further includes etching the dielectric layer using the first layer set as a mask to form an opening in the dielectric layer, wherein etching the dielectric layer comprises reducing a thickness of the first layer set.

Method of making a semiconductor device using multiple layer sets

This description relates to a method of making a semiconductor device including forming an inter-level dielectric (ILD) layer over a substrate and forming a layer set over the ILD layer. The method further includes etching the layer set to form a tapered opening in the layer set and etching the ILD layer using the layer set as a mask to form an opening in the ILD layer. The opening in the ILD layer has a line width roughness (LWR) of less than 3 nanometers (nm). This description also relates to a semiconductor device including an inter-level dielectric (ILD) layer over a substrate; and a layer set over the ILD layer. The layer set has a tapered opening within the layer set. Etching the layer set comprises forming the tapered opening having sidewalls at an angle with respect to a top surface of the ILD layer ranging from 85-degrees to 90-degrees.

Method of making a semiconductor device using a bottom antireflective coating (BARC) layer

A mechanism for forming a semiconductor device is described. The semiconductor device includes a substrate and an inter-layer dielectric (ILD) layer over the substrate. The intermediate semiconductor device further includes a first layer set over the ILD layer and a second layer set over the first layer set. The intermediate semiconductor device further includes a photoresist layer over the second layer set. The method further includes etching the second layer set to form a tapered opening in the second layer set, the tapered opening having sidewalls at an angle with respect to a top surface of the ILD layer ranging from about 85-degrees to about 90-degrees, but less than 90-degrees. The method further includes etching the first layer set to form an opening in the first layer set and etching the ILD layer using the first layer set as a mask to form an opening in the ILD layer.

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Hsinchu, Taiwan

Bi-Ming Yen