International Business Machines Corporation

International Business Macjines Coporation

Bernd Karl Appelt

Robert Maynard Japp

Kostantinos I Papathomas

John M Lauffer

Mark David Poliks

William John Rudik

William Thomas Fotorny

Konstantinos I Papathomas

Michael A Gaynes

James Robert Wilcox

Gary A Johansson

Saswati Datta

Voya Rista Markovich

Kostas I Papathomas

Irving Memis

David John Russell

Luis Jesus Matienzo

John Joseph Konrad

Gerald Walter Jones

Yenloan H Nguyen

Sampath Purushothaman

Jeffrey Donald Gelorme

Jonathan David Reid

Sung Kwon Kang

Anilkumar Chinuprasad Bhatt

John Steven Kresge

William E Wilson

Richard A Schumacher

Robin A Susko

Perminder S Bindra

James W Fuller, Jr

Andrew Michael Seman

Jae M Park

Robert Daniel Edwards

Ronald A Kaschak

Lawrence Robert Blumberg

Amarjit S Rai

James R Loomis

Ross Downey Havens

Irv Memis

Jan Obrzut

James R White

George P Schmitt

James Jens Hansen

John F Shipley

Joseph Hromek

David K Balkin

Lisa J Smith

Magan S Patel

Lawrence C Alexander

A capacitive element for a circuit board or chip carrier is formed from a pair of conductive sheets having a dielectric component laminated therebetween. The dielectric component is formed of two or more dielectric sheets, at least one of which can be partially cured followed by being fully cured. The partially cured sheet is laminated to at least one other sheet of dielectric material and one of the sheets of conductive material. The total thickness of the two sheets of the dielectric component does not exceed about 4 mils and preferably does not exceed about 3 mils. The use of two or more sheets of dielectric material makes it very unlikely that two or more defects in the sheets of dielectric material will align, thus greatly reducing the probability of a defect causing a failure in test or field use.

Printed circuit board capacitor structure and method

A printed circuit board for use in an electronic device package such as a ball grid array package or organic chip carrier package. This printed circuit board includes a glass-free dielectric for separating and insulating power cores, circuitry or plated through holes from each other to prevent shorts caused by a migration of conductive material along glass-based prepreg substrates.

Printed circuit boards for electronic device packages having glass free non-conductive layers and method of forming same

A method is provided for connecting two conductive surfaces in an electronic circuit package comprising the steps of forming dendrites on selected regions of a first conductive surface, applying a dielectric insulation material over the first conductive surface such that the dendrites are exposed through the insulation material to leave a substantially planar surface of exposed dendrites, and placing a second conductive surface on top of the exposed dendrites. The second conductive surface may be a surface metal, a chip bump array, or a ball grid array. Also claimed is an electronic circuit package incorporating the dendrites used for electrical interconnection and planarization manufactured in accordance with the present invention.

Method for producing dendrite interconnect for planarization

An organic chip carrier having metallic circuitry and wire bond pads thereon is bonded to an integrated circuit die by a photocurable adhesive and is electrically connected therewith by wire bonding to the wire bond pads.

Die attachment with reduced adhesive bleed-out

A method of forming a capacitive element for a circuit board or chip carrier having improved capacitance is provided. The element is formed from a pair of conductive sheets having a dielectric component laminated therebetween. The dielectric component is formed of two or more dielectric sheets, at least one of which can be partially cured followed by being fully cured. The lamination takes place by laminating a partially cured sheet to at least one other sheet of dielectric material and one of the conductive sheets. The total thickness of the two sheets of the dielectric component does not exceed about 4 rolls and preferably does not exceed about 3 mils; thus, the single dielectric sheet does not exceed about 2 mils and preferably does not exceed about 1.5 mils in thickness.

Method of forming a capacitive element

A capacitive element for a circuit board or chip carrier having improved capacitance and method of manufacturing the same is provided. The structure is formed from a pair of conductive sheets having a dielectric component laminated therebetween. The dielectric component is formed of two or more dielectric sheets, at least one of which can be partially cured or softened followed by being fully cured or hardened. The lamination takes place by laminating a partially cured or softened sheet to at least one other sheet of dielectric material and one of the sheets of conductive material. The total thickness of the two sheets of the dielectric component does not exceed about 4 mils and preferably does not exceed about 3 mils; thus, the single dielectric sheet does not exceed about 2 mils and preferably does not exceed about 1.5 mils in thickness. The use of two or more sheets of dielectric material makes it very unlikely that two or more defects in the sheets of dielectric material will align, thus greatly reducing the probability of a defect causing a failure in test or field use.

The present invention provides a unique, high density, electronic package having a conductive composition for filling vias or through holes to make reliable vertical or Z-connects from a dielectric layer to adjacent electrical circuits. The through holes may be plated or non-plated prior to filling. A description for making high density electronic packaging using this feature is also disclosed.

Electronic package having substrate with electrically conductive through holes filled with polymer and conductive composition

Chip carriers with enhanced wire bondability

Apertures in a circuit board or chip carrier are filled with a cured photosensitive dielectric material by substantially filling the apertures in the circuit board or chip carrier and applying a layer of a thickness to the circuit board or chip carrier with a positive photosensitive dielectric material, exposing the photosensitive dielectric material to actinic radiation in such a way as to leave material located in apertures unexposed to the radiation; baking the structure so as to harden the unexposed photosensitive dielectric material and developing the exposed dielectric material in order to remove it leaving behind cured photosensitive dielectric material in the apertures.

Process for filling apertures in a circuit board or chip carrier

A method is provided for connecting two conductive layers in an electronic circuit package comprising the steps of forming dendrites on selected regions of a first conductive layer, forming dendrites on selected regions of a second conductive layer, applying an epoxy adhesive material over the first conductive layer, and compressively attaching the second conductive layer to the first conductive layer such that the dendrites on the first conductive layer contact the dendrites on the second conductive layer. Also claimed is an electronic circuit package incorporating the dendrites used for electrical interconnection manufactured in accordance with the present invention. An alternative embodiment of the invention utilizes an intermediate surface metal with dendrites in place of a &ldquo;through via.&rdquo;

Method for producing conductor interconnect with dendrites

A method and structure is provided for preventing wetting or bleed of an adhesive, such as an epoxy, onto noble metal wire bond pads on the surface of a dielectric substrate when attaching an I/C chip to the substrate. The method includes treating the wire bond pads with a chemical composition which prevents bleeding onto the surfaces of the wire bond pads by a component of the epoxy. The chemical composition is a chemical which will provide &ldquo;Self-Assembled Monolayers&rdquo; (SAMs) on the surface of the gold. These compositions are characterized by a molecule having at least one group, such as a mercaptan or disulfide, connected to a hydrocarbon moiety, such as a (CH ) chain. The affinity of the thiol or sulfur-containing portion of the molecule chemically bonding with the noble metal provides a relatively strong attachment of the molecule to the metal surface. The hydrocarbon segment presents a surface on the noble metal that has the characteristics of the hydrocarbon portion of the molecule which has a low surface tension, and, thus, prevents wetting of the noble metal by an epoxy adhesive component. The SAMs, once they provide protection from the bleed of the die attach adhesives, self desorb during the wire bonding or soldering temperatures.

Method for preventing adhesive bleed onto surfaces

A circuit board having a structure including a permanent photoimageable dielectric material suitable for fabrication of vias both by laser ablation, plasma ablation, or mechanical drilling techniques and by photoimaging techniques. A process is also disclosed for the manufacture of a multi-level circuit on a substrate having a first-level circuitry pattern on at least one side. The process comprises applying a permanent photoimageable dielectric over the first-level circuitry pattern; exposing the permanent photoimageable dielectric to radiation; laminating a conductive metal layer to the dielectric; making holes in the conductive metal layer and dielectric by mechanical drilling or by laser or plasma ablation; and making a second-level circuitry pattern and filling the holes with a conductive material to electrically connect the first and second layers of circuitry. A further process is claimed for designing a multi-level circuit board product comprising making a prototype having the above structure in which the holes are manufactured by mechanical drilling or by laser or plasma ablation, evaluating the prototype, and then manufacturing a commercial circuit board having essentially the same structure and materials of construction as the prototype, but wherein the holes are manufactured by photoimaging techniques.

Process for manufacturing a multi-layer circuit board

A method for coating cloth especially fiberglass sheets with a thermosetting resin and resulting structure is provided. The coating is performed in two steps. In the first step, essentially all of the strands of the fiberglass are coated with the resin/solvent mixture while maintaining at least some of the interstices or openings essentially free of the solvent mixture. This first coating is then partially cured to between about 70% and 90% of full cure. The coated fiberglass with partially cured resin thereon is then given a second coating of either the same or different thermosetting resin mixture which coats the first coating and fills in the interstices between the fibers. This second coating is then partially cured, which advances the cure of the first coating past 80% full cure and results in an impregnated fiberglass cloth structure for use as sticker sheets. During lamination, the first coating acts like an impenetrable insulating sheet, preventing resin displacement and, therefore, preventing glass fiber contact with the conductive planes. The second coating is fluid enough to fill in spaces in the planes and to form the adhesive bond to cores and conductive layers. The structure reduces the tendency of the resin to flake and produce dust during subsequent processing operations.

Dustfree prepreg and method for making an article based thereon

Conductor interconnect with dendrites through film

Process for design and manufacture of fine line circuits on planarized thin film dielectrics and circuits manufactured thereby

Growing community of inventors

Apalachin, NY, United States of America

Bernd Karl Appelt