United Test and Assembly Center Limited

Beng Kuan Lim

Hien Boon Tan

Ravi Kanth Kolan

Anthony Yi Sheng Sun

Krishnamoorthi Sivalingam

A chip scale integrated circuit package includes an integrated circuit chip which has a first face and a second face. A plurality of pillar bumps are formed on the first face of the integrated circuit chip. An encapsulant material encapsulates the sides and the first face of the integrated circuit chip, and the pillar bumps. Upper ends of the pillar bumps remain free from encapsulant material and a substantially planar surface is formed by an upper surface of the encapsulant material and the upper ends of the pillar bumps. A plurality of solder balls are mounted on the substantially planar surface in locations corresponding to the upper ends of the pillar bumps.

Growing community of inventors

Singapore, Singapore

Beng Kuan Lim