Chinese Academy of Sciences

Baoshun Zhang

Xiaodong Zhang

Guohao Yu

Fu Chen

Yong Cai

Wenxin Tang

Xing Wei

Desheng Zhao

Yaming Fan

Wenkui Lin

Zhihua Dong

The present application discloses a vertical UMOSFET device with a high channel mobility and a preparation method thereof. The vertical UMOSFET device with a high channel mobility includes an epitaxial structure, and a source, a drain and a gate which match the epitaxial structure, where the epitaxial structure includes a first semiconductor, and a second semiconductor and a third semiconductor which are sequentially disposed on the first semiconductor, a groove structure matching the gate is also disposed in the epitaxial structure, and the groove structure continuously extends into the first semiconductor from a first surface of the epitaxial structure; a fourth semiconductor is also disposed at least between an inner wall of the groove structure and the second semiconductor, and the fourth semiconductor is a high resistivity semiconductor.

Vertical UMOSFET device with high channel mobility and preparation method thereof

The disclosure provides a gallium oxide film based on sapphire substrate as well as a growth method and an application thereof. The gallium oxide film based on sapphire substrate is prepared by a method below, including: forming more than one α-(AlGa)Ostrain buffering layers on the sapphire substrate by means of pulsed epitaxial growth, wherein 0.99≥x≥0.01; and forming gallium oxide epitaxial layers on the α-(AlGa)Ostrain buffering layers. The growth method provided can not only avoid the technical difficulty of contradictory epitaxial temperatures of α-GaOand α-AlO, but also effectively reduce the defect density of α-GaOepitaxial film, thus further improving the crystal quality of the α-GaOepitaxial film materials.

Gallium oxide film based on sapphire substrate as well as growth method and application thereof

A film bulk acoustic resonator and a fabricating method thereof is provided. The fabricating method includes: fabricating a lower electrode on a first surface of an SOI substrate; forming piezoelectric layers on the first surface of the SOI substrate and the lower electrode; forming top electrodes on the piezoelectric layers; processing an air cavity on a second surface of the SOI substrate, wherein the second surface and the first surface are oppositely arranged. The fabricating method simplifies a preparation process of FBAR, a quality of a AlN film crystal grown though the fabrication method is high, an improvement of a device performance is facilitated, and meanwhile a thickness of a top silicon is controlled through a position of a silicon injected oxygen isolation to regulate a frequency of the film bulk acoustic resonator.

Fabricating method of film bulk acoustic resonator

A group III nitride transistor structure capable of reducing a leakage current and a fabricating method thereof are provided. The group III nitride transistor structure includes: a first heterojunction and a second heterojunction which are laminated, wherein the first heterojunction is electrically isolated from the second heterojunction via a high resistance material and/or insertion layer; a first electrode, a second electrode and a first gate which are matched with the first heterojunction, wherein a third semiconductor is arranged between the first gate and the first heterojunction, and the first gate is also electrically connected with the first electrode; a source, a drain and a second gate which are matched with the second heterojunction, wherein the source and the drain are also respectively electrically connected with the first gate and the second electrode, and a sixth semiconductor is arranged between the second gate and the second heterojunction.

Group III nitride transistor structure capable of reducing leakage current and fabricating method thereof

The present disclosure discloses a ballistic transport semiconductor device based on nano array and a manufacturing method thereof. The ballistic transport semiconductor device based on nano array comprises a conducting substrate, more than one semiconductor nano bump portion is arranged on a first surface of the conducting substrate, a top end of the semiconductor nano bump portion is electrically connected with a first electrode, a second surface of the conducting substrate is electrically connected with a second electrode, the second surface and the first surface are arranged back to back, and the height of the semiconductor nano bump portion is less than or equal to a mean free path of a carrier. The carrier is not influenced by various scattering mechanisms in a transporting procedure by virtue of the existence of ballistic transport characteristics, thereby obtaining a semiconductor device having advantages of lower on resistance, less working power consumption.

Ballistic transport semiconductor device based on nano array and manufacturing method

A group III nitride high electron mobility transistor (HEMT) device comprises a source electrode (), a drain electrode (), a main gate (), a top gate (), an insulating dielectric layer () and a heterostructure, wherein the source electrode () and the drain electrode () are electrically connected via two-dimensional electron gas (2DEG) formed in the heterostructure; the heterostructure comprises a first semiconductor () and a second semiconductor (); the first semiconductor () is disposed between the source electrode () and drain electrode (); the second semiconductor () is formed on the surface of the first semiconductor () and is provided with a band gap wider than the first semiconductor (); the main gate () is disposed at the side of the surface of the second semiconductor () adjacent to the source electrode (), and is in Schottky contact with the second semiconductor (); the dielectric layer () is disposed on the surfaces of the second semiconductor () and the main gate () and between the source electrode () and the drain electrode (); the top gate () is formed on the surface of the dielectric layer (), at least one side edge of the top gate extends towards the direction of the source electrode () or the drain electrode (), and the orthographic projection of the top gate overlaps with the two side edges of the main gate (). When the HEMT device is at work, the main gate () and the top gate () are respectively controlled by a control signal. The device can effectively inhibit the 'current collapse effect'.

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Suzhou, China

Baoshun Zhang