Applied Materials, Inc.

Balasubramanian Pranatharthiharan

Mukund Srinivasan

Tomohiko Kitajima

Gill Yong Lee

Described is a memory device including a plurality of memory cells formed around a memory hole extending through a memory stack on a substrate. Each of the plurality of memory cells comprises a discrete blocking oxide layer, a charge trap layer, and a tunnel oxide layer. The blocking oxide layer is discrete between each of the plurality of memory cells. The tunnel oxide layer is continuous between each of the plurality of memory cells, and the charge trap layer is discrete between each of the plurality of memory cells. The charge trap layer has a first thickness on a top portion and a second thickness on a center portion, the first thickness different than the second thickness.

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San Jose, CA, United States of America

Balasubramanian Pranatharthiharan