Ball Semiconductor Corporation

Other

Nippon Steel Corporation

Atsuyuki Fukano

Kohei Tatsumi

Nobuo Takeda

Eiji Hashino

Kenji Shimokawa

Akira Ishikawa

Hideki Koide

Shunsuke Yasutaka

Zhiqiang Feng

A spherical semiconductor device includes a spherical semiconductor element having one or more electrodes on its surface. Spherical conductive bumps are formed at the positions of the electrodes. The electrodes are so arranged as to contact a common plane. Spherical bumps constituting a group to be connected to the outside protrude above the spherical semiconductor element such that a predetermined gap is formed between a plane or a spherical surface capable of contacting the spherical bumps and the surface of the spherical semiconductor element. The spherical semiconductor device is connected to various circuit boards or another semiconductor device through the spherical bumps. This affords easy and accurate electrical connections to the outside.

Spherical semiconductor device and method for fabricating the same

The present invention provides a method for segmenting and mapping a two-dimensional conventional circuit pattern to a flat mask for projection onto a three-dimensional surface. The circuit pattern is first segmented into a plurality of circuit segments enclosed in a plurality of base units of an imposed grid system. Subsequently, locations and the boundary conditions for a plurality of mask segments on the mask are determined such that no unneeded overlapping at the boundaries of the projected image on the spherical shaped semiconductor device is possible. The mask, along with a photolithography system having a plurality of mirrors, projects the circuit pattern onto the spherical shaped semiconductor device.

System and method for generating a flat mask design for projecting a circuit pattern to a spherical semiconductor device

The present invention discloses a magnetic random access memory (MRAM). It improves upon conventional RAM designs by memorizing a logic bit value through magnetizing ferromagnetic material layer near the intersection of a specific word line and bit line. A write operation and an erase operation can be performed by changing direction of current flow on the bit line and word line. A read operation can be performed by monitoring an output current signal from an input current signal. A multiple layer design can be done on a silicon substrate to implement the MRAM by appropriately arranging the layers for the bit line, the word line, and the ferromagnetic material layer.

Magnetic random access memory

A unique integrated circuit device and method for using same is disclosed. The integrated circuit includes a plurality of bonding pads. Coupled to each bonding pads is a ferromagnetic material and an external connector, such as a solder bump. The ferromagnetic material is isolated to an area associated with each bonding pad. When the ferromagnetic material is magnetized, it is capable of aligning the solder bump to a connection point of another device, as long as the connection point is magnetically attracted. The other device may be a second integrated circuit device or a circuit board. As a result, the bonding pad aligns with and connects to the connection point.

Magnetic alignment system for bumps on an integrated circuit device

Growing community of inventors

Chiba, Japan

Atsuyuki Fukano