Nippondenso Co., Ltd.

Atsushi Komura

Shoji Miura

Kenji Kondo

Takeshi Yamauchi

Tooru Yamaoka

Yoshihiko Isobe

Hiroyuki Yamane

Yoshikazu Sakano

Keiichi Kon

Tetsuhiko Sanbei

Toshio Sakakibara

Takayuki Sugisaka

Kazuo Akamatsu

The purpose of the present invention is to obtain an electrode wiring structure for semiconductor devices that can suppress the occurrence of Al voids inside aluminum alloy wiring without regard to the orientation of such aluminum alloy wiring. An interlayer insulator film , a titanium layer , a titanium nitride layer that serves as the barrier layer, an aluminum alloy wiring layer and a protective film are formed on top of the silicon substrate to compose the electrode structure. In this case, a distortion relaxation layer , with a film thickness of approximately over 10 nm and which is an intermetallic compound that includes aluminum and titanium in its composition, is formed in between the titanium nitride layer and the aluminum alloy wiring layer . Because of this distortion relaxation layer, for every wiring width of 1 &mgr;m, the number of Al voids with widths of over 0.3 &mgr;m is practically reduced to 0.

Electrode for semiconductor device and method for manufacturing same

The purpose of the present invention is to obtain an electrode wiring structure for semiconductor devices that can suppress the occurrence of Al voids inside aluminum alloy wiring without regard to the orientation of such aluminum alloy wiring. An interlayer insulator film 11, a titanium layer 12, a titanium nitride layer 13 that serves as the barrier layer, an aluminum alloy wiring layer 15 and a protective film 18 are formed on top of the silicon substrate 10 to compose the electrode structure. In this case, a distortion relaxation layer 14, with a film thickness of approximately over 10 nm and which is an intermetallic compound that includes aluminum and titanium in its composition, is formed in between the titanium nitride layer 13 and the aluminum alloy wiring layer 15. Because of this distortion relaxation layer, for every wiring width of 1 .mu.m, the number of Al voids with widths of over 0.3 .mu.m is practically reduced to 0.

Electrode for semiconductor device including an alloy wiring layer for

A process for forming trenches on a surface of a semiconductor substrate by dry etching using a gas mixture. The gas mixture comprises; (1) an etchant gas comprising at least bromine which etches the semiconductor surface to form trenches, (2) a cleaning gas comprising a halogen which evaporates residue formed by the etching, and (3) a reactive gas, e.g. N.sub.2, capable of reacting with material formed during the etching and capable of controlling the inclination of the trenches.

Dry etching process for semiconductor

Method for fabrication of semiconductor device

A process for forming deep trenches on a surface of a semiconductor substrate by forming a mask on the surface of the semiconductor, which prescribes the position of the trenches; and then dry etching the semiconductor surface using a gas mixture comprising (1) an etchant, bromine containing, gas which etches the semiconductor surface to form trenches, (2) a cleaning, halogen containing, gas which evaporates the residue formed by the etching; and (3) a reactive gas capable of reacting with material formed during the etching and capable of decreasing the wastage of the mask by the etchant gas.

An aluminum line including nitrogen formed as a film in a semiconductor integrated circuit is disclosed. Each crystal grain size of the aluminum line is lower than or equal to 0.3 .mu.m to suppress electromigration. A method of forming the aluminum line which can supress electromigration is also disclosed. The amount of an inert gas Q and the amount of a nitrogen gas Q.sub.N are controlled to satisfy '2.ltoreq.(Q.sub.N /Q).times.100.ltoreq.10'.

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Obu, Japan

Atsushi Komura