Intel Corporation

Santa Clara

Arnab Roy

Jeremy D Ecton

Oscar Ojeda

Nicholas S Haehn

Leonel R Arana

Hiroki Tanaka

Hsin-Wei Wang

Timothy White

Robert Alan May

Suddhasattwa Nad

Vahidreza Parichehreh

Chung Kwang Tan

Kristof Darmawikarta

Gang Duan

Changhua Liu

Yosuke Kanaoka

Yi Li

Wei Li

Minglu Liu

Robin Mcree

Raquel De Souza Borges Ferreira

Hong Seung Yeon

A method for recognizing a reference point associated with a fiducial marker including the steps of: obtaining or receiving image data of the fiducial marker; determining the degree of which the image data of the fiducial marker is aligned with one or more reference images; of which if the degree of alignment is determined to be less than an acceptable threshold predicting a set of coordinates of the reference point associated with the fiducial marker; incorporating the set of coordinates with the image data to form a modified image data; and determining the degree of which the modified image data of the fiducial marker is aligned with one or more reference images.

Device and method for improved fiducial marker detection

Embodiments include a package structure with one or more layers of dielectric material, where an interconnect bridge substrate is embedded within the dielectric material. One or more via structures are on a first surface of the embedded substrate, where individual ones of the via structures comprise a conductive material and have a tapered profile. The conductive material is also on a sidewall of the embedded substrate.

Via structures having tapered profiles for embedded interconnect bridge substrates

Disclosed herein are via-trace structures with improved alignment, and related package substrates, packages, and computing device. For example, in some embodiments, a package substrate may include a conductive trace, and a conductive via in contact with the conductive trace. The alignment offset between the conductive trace and the conductive via may be less than 10 microns, and conductive trace may have a bell-shaped cross-section or the conductive via may have a flared shape.

Via-trace structures

Techniques and mechanisms for providing anisotropic etching of a metallization layer of a substrate. In an embodiment, the metallization layer includes grains of a conductor, wherein a first average grain size and a second average grain size correspond, respectively, to a first sub-layer and a second sub-layer of the metallization layer. The first sub-layer and the second sub-layer each span at least 5% of a thickness of the metallization layer. A difference between the first average grain size and the second average grain size is at least 10% of the first average grain size. In another embodiment, a first condition of metallization processing contributes to grains of the first sub-layer being relatively large, wherein an alternative condition of metallization processing contributes to grains of the second sub-layer being relatively small. A grain size gradient across a thickness of the metallization layer facilitates etching processes being anisotropic.

Method, device and system for providing etched metallization structures

A method of anisotropic etching comprises forming a metal layer above a substrate. A mask layer is formed on the metal layer with openings defined in the mask layer to expose portions of the metal layer. The exposed portions of the metal layer are introduced to an active etchant solution that includes nanoparticles as an insoluble banking agent. In further embodiments, the exposed portions of the metal layer are introduced to a magnetic and/or an electrical field.

Enhanced etch anisotropy using nanoparticles as banking agents in the presence or absence of a magnetic or electrical field

The systems and methods described herein use at least one etchant and at least one photochemically active material in conjunction with electromagnetic energy applied simultaneous with the etchant and photochemically active material during the etching process. The interaction between the electromagnetic energy and the photochemically active material preferentially increases the etch rate in a direction along the axis of incidence of the electromagnetic energy, thereby permitting the anisotropic formation of voids within the semiconductor substrate. These anisotropic voids may be more closely spaced (i.e., arranged on a tighter pitch) than the isotropic voids produced using conventional etching technologies. By placing the voids in the semiconductor substrate on a tighter pitch, greater component density may be achieved.

Anisotropic etching systems and methods using a photochemically enhanced etchant

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Chandler, AZ, United States of America

Arnab Roy