Adeia Semiconductor Bonding Technologies Inc.

Invensas Bonding Technologies, Inc.

Other

Adeia Semiconductor Technologies LLC

Arkalgud R Sitaram

Cyprian Emeka Uzoh

Charles Gerard Woychik

Liang Wang

Hong Shen

Rajesh Katkar

Guilian Gao

Javier A DeLaCruz

Paul M Enquist

Belgacem Haba

Zhuowen Sun

Laura Wills Mirkarimi

Bong-Sub Lee

Akash Agrawal

Bongsub Lee

Scott P McGrath

Andrew Cao

A bonded structure is disclosed. The bonded structure can include a semiconductor element comprising active circuitry and a first bonding layer. The bonded structure can include a protective element directly bonded to the semiconductor element without an adhesive along a bonding interface. The protective element can include an obstructive material disposed over the active circuitry and a second bonding layer on the obstructive material. The second bonding layer can be directly bonded to the first bonding layer without an adhesive. The obstructive material can be configured to obstruct external access to the active circuitry.

Bonded structure including an obstructive element directly bonded to a semiconductor element without an adhesive

A bonded structure is disclosed. The bonded structure includes a first element that has a front side and a back side that is opposite the front side. The first element has a first conductive pad and a first nonconductive field region at the front side of the first element. The bonded structure also includes a second element that has a second conductive pad and a second nonconductive field region at a front side of the second element. The second conductive pad is bonded to the first conductive pad along an interface structure. The bonded structure also includes an integrated device that is coupled to or formed with the first element or the second element. The bonded structure further includes an elongate conductive structure that extends from the back side of the first element to the interface structure. The elongate conductive structure provides an effectively closed profile around the integrated device.

Sealed bonded structures and methods for forming the same

Capacitive couplings in a direct-bonded interface for microelectronic devices are provided. In an implementation, a microelectronic device includes a first die and a second die direct-bonded together at a bonding interface, a conductive interconnect between the first die and the second die formed at the bonding interface by a metal-to-metal direct bond, and a capacitive interconnect between the first die and the second die formed at the bonding interface. A direct bonding process creates a direct bond between dielectric surfaces of two dies, a direct bond between respective conductive interconnects of the two dies, and a capacitive coupling between the two dies at the bonding interface. In an implementation, a capacitive coupling of each signal line at the bonding interface comprises a dielectric material forming a capacitor at the bonding interface for each signal line. The capacitive couplings result from the same direct bonding process that creates the conductive interconnects direct-bonded together at the same bonding interface.

Capacitive coupling in a direct-bonded interface for microelectronic devices

In various embodiments, a method for forming a bonded structure is disclosed. The method can comprise mounting a first integrated device die to a carrier. After mounting, the first integrated device die can be thinned. The method can include providing a first layer on an exposed surface of the first integrated device die. At least a portion of the first layer can be removed. A second integrated device die can be directly bonded to the first integrated device die without an intervening adhesive.

Stacked dies and methods for forming bonded structures

A bonded structure can include a first element having a first conductive interface feature and a second element having a second conductive interface feature. An integrated device can be coupled to or formed with the first element or the second element. The first conductive interface feature can be directly bonded to the second conductive interface feature to define an interface structure. The interface structure can be disposed about the integrated device in an at least partially annular profile to connect the first and second elements.

Bonded structures

Protective elements for bonded structures including an obstructive element

An integrated circuit (IC) package includes a first substrate having a backside surface and a top surface with a cavity disposed therein. The cavity has a floor defining a front side surface. A plurality of first electroconductive contacts are disposed on the front side surface, and a plurality of second electroconductive contacts are disposed on the back side surface. A plurality of first electroconductive elements penetrate through the first substrate and couple selected ones of the first and second electroconductive contacts to each other. A first die containing an IC is electroconductively coupled to corresponding ones of the first electroconductive contacts. A second substrate has a bottom surface that is sealingly attached to the top surface of the first substrate, and a dielectric material is disposed in the cavity so as to encapsulate the first die.

Integrated interposer solutions for 2D and 3D IC packaging

A device and method of forming the device that includes cavities formed in a substrate of a substrate device, the substrate device also including conductive vias formed in the substrate. Chip devices, wafers, and other substrate devices can be mounted to the substrate device. Encapsulation layers and materials may be formed over the substrate device in order to fill the cavities.

Structures and methods for reliable packages

A bonded structure can include a first element having a first interface feature and a second element having a second interface feature. The first interface feature can be bonded to the second interface feature to define an interface structure. A conductive trace can be disposed in or on the second element. A bond pad can be provided at an upper surface of the first element and in electrical communication with the conductive trace. An integrated device can be coupled to or formed with the first element or the second element.

Growing community of inventors

Cupertino, CA, United States of America

Arkalgud R Sitaram