Infineon Technologies Ag

Anke Krasemann

Martin Schrems

Moritz Haupt

Dietmar Temmler

Christian Drabe

Jens-Uwe Sachse

Helmut Wurzer

Bruno Spuler

Thomas Morgenstern

Alexandra Lamprecht

Barbara Lorenz

Jana Haensel

Dietmar Ottenw&auml;lder

Gustav Beckmann

Thomas Pompl

Sabine Steck

Torsten Schneider

Daniel K&ouml;hler

One embodiment of the invention relates to a method for forming trench memory cell structures having trench capacitors and planar selection transistors. An implantation for forming a reinforcement implant for improving the electrical connection of a storage electrode of a trench capacitor to a first source/drain zone of the respective selection transistor is effected in a self-aligned manner with respect to gate stacks provided above a substrate surface of the semiconductor substrate. In order to form the reinforcement implant, the deposition process for a first insulator layer, from which dielectric spacer structures of the gate stacks emerge, is divided into at least two substeps, the implantation being preceded by application of a base layer of the first insulator layer, the layer thickness of which defines the distance between the reinforcement implant and the gate stacks. A covering layer of the first insulator layer that is provided after the implantation improves the dielectric properties of the spacer structures which insulate the gate stacks from bit contact structures to be provided between the gate stacks.

Method for forming trench memory cell structures for DRAMS

A two-step etch process is used to form a vertical collar oxide within the upper portion of a trench capacitor. The first step uses CF/SiF/Ochemistry and ends when the bottom of the collar within the trench is opened although a thin oxide layer still remains on the surface of the PAD-nitride. The second etch step uses CFchemistry to completely remove the remaining silicon oxide layer. The process provides a good uniformity in thickness of the PAD-nitride layer and sufficient collar oxide thickness in the very top section of the collar oxide. The process is applicable for manufacturing deep trench capacitors for DRAM devices.

Method of forming an isolation layer and method of manufacturing a trench capacitor

A method for fabricating a deep trench capacitor for dynamic memory cells in which a trench is etched into the depth of a semiconductor substrate, and wherein the interior of the trench is provided with a doping and a dielectric and is filled with a conductive material as an inner electrode. The inner electrode and the dielectric are etched back within a collar region, and a collar is formed using a collar process comprising a collar oxide deposition and etching back of the collar oxide on the substrate surface and in the trench as far as the inner electrode, after which the inner electrode is completed by further steps of depositing and etching back conductive layers. Prior to the doping a masking layer is applied to the collar region of the trench, and this masking layer is removed again before the collar process. Before the dielectric is applied the surface of the lower regions of the trench outside the collar region a layer of grains of conductive material is applied.

Method for fabricating a deep trench capacitor for dynamic memory cells

A trench capacitor is formed with an insulation collar. After the formation of the trench, firstly an insulating layer is deposited, from which layer the insulation collar will be subsequently formed. Afterward, the trench is partly filled with a sacrificial filling material and a thin patterning layer is deposited thereon. Spacers are formed from that layer and cover the insulating layer in the upper region of the trench. Afterward, the sacrificial filling material and the insulating layer are completely removed in the lower region of the trench. As a result, the insulation collar is produced in the upper region of the trench.

Method for fabricating an insulation collar in a trench capacitor

A method of fabricating a barrier layer includes oxidizing a silicon-containing substrate to form a substrate oxide layer on the surface of the substrate, producing an oxygen-impervious layer at an interface between the substrate oxide layer and the substrate, and etching the substrate oxide layer until the underlying oxygen-impervious layer is uncovered.

Method for fabricating a barrier layer

A method for manufacturing a trench capacitor uses a low-pressure gas phase doping for forming a buried plate as a capacitor plate. The use of the low-pressure gas phase doping reduces process costs and improves capacitor properties.

Method for manufacturing a trench capacitor

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Dresden, Germany

Anke Krasemann