Tokyo Electron Limited

Tokyo Electron Limi Ted

Andrew W Metz

Yun Han

Shihsheng Chang

Angelique Denise Raley

Junling Sun

David L O'Meara

Katie Lutker-Lee

Xinghua Sun

Minjoon Park

Anton J deVillers

Alok Ranjan

Kai-Hung Yu

Eric Chih-Fang Liu

Lior Huli

Yannick Feurprier

Shan Hu

Henan Zhang

Yen-Tien Lu

Ya-Ming Chen

Hongyun Cottle

Hiroie Matsumoto

Caitlin Philippi

Hiroaki Niimi

Kandabara N Tapily

Kaushik Arun Kumar

Eiji Suzuki

Peter Ventzek

Cory Wajda

Hiroto Ohtake

Mingmei Wang

Du Zhang

Peter E Biolsi

Christopher Cole

Sophie Thibaut

Blaze Messer

Yusuke Ohsawa

Yunho Kim

Cheryl Alix

A method includes providing a substrate including metal gate stacks and source/drain contact regions in alternating arrangement along a surface of the substrate with a dielectric spacer separating each source/drain contact region from adjacent metal gate stacks. Each source/drain region is recessed within an opening between adjacent metal gate stacks such that source/drain contact regions provide a bottom of the recess and dielectric spacers provide sidewalls. The etch stop layer is formed on the substrate such that it conformally covers the metal gate stacks, the sidewalls and the bottom of each recess, and a sacrificial layer is formed over each of the metal gate stacks and on at least a portion of each sidewall. The etch stop layer is removed from the bottom of each recess to expose the source/drain contact, and the sacrificial layer is then removed from the metal gate stacks and the sidewalls of each recess.

Sacrificial capping layer for gate protection

A method of etching a substrate includes loading the substrate into a plasma etch chamber, the plasma etch chamber including a focus ring surrounding the substrate, the focus ring including a bulk material and a surface layer, the surface layer including a refractory metal; flowing a process gas including fluorine and carbon into the plasma etch chamber; coating a carbide layer over the surface layer of the focus ring, the coating including exposing the focus ring to a plasma generated from the process gas in the plasma etch chamber, the carbide layer including a carbide of the refractory metal; and etching the substrate, the etching including exposing the substrate to the plasma.

In-situ focus ring coating

A method of fabricating an amorphous carbon layer (ACL) mask includes forming an ACL on an underlying layer. The ACL includes a soft ACL portion that has a first hardness and a hard ACL portion that has a second hardness. The soft ACL portion underlies the hard ACL portion. The second hardness is greater than the first hardness. The method further includes forming a patterned layer over the ACL and forming an ACL mask by etching through both the soft ACL portion and the hard ACL portion of the ACL to expose the underlying layer using the patterned layer as an etch mask. Forming the ACL may include depositing one or both of the soft ACL portion and the hard ACL portion. Processing conditions may also be varied while forming the ACL to create a hardness gradient that transitions from softer to harder.

Variable hardness amorphous carbon mask

A method of processing a substrate that includes: loading the substrate into a plasma etch chamber, the substrate including a patterned hard mask layer and an underlying layer, the plasma etch chamber including: a chamber part having a surface including a refractory metal; and a first electrode; flowing a process gas into the plasma etch chamber; while flowing the process gas, applying a source power to the first electrode of the plasma etch chamber to generate a plasma in the plasma etch chamber; exposing the surface of the chamber part to the plasma to sputter the refractory metal from the surface of the chamber part; and exposing the substrate to the plasma to deposit the refractory metal onto a portion of the patterned hard mask layer and etch the underlying layer selectively to the patterned hard mask layer.

Plasma etching tools and systems

A method for manufacturing a FET semiconductor structure includes providing a substrate comprising at least one source/drain contact of at least one FET, the at least one source/drain contact formed adjacent to a dummy gate of the at least one FET. A TiSifilm with C54 structure is selectively deposited directly on and fully covering the at least one source/drain contact relative to a vertical sidewall of a gate spacer between the at least one source/drain contact and the dummy gate. The dummy gate is replaced with a replacement metal gate.

Method of forming a FET structure by selective deposition of film on source/drain contact

In certain embodiments, a method of forming a semiconductor device includes receiving a substrate having an etch mask layer that includes features for preserving corresponding portions of an underlying hard mask layer to be etched during an etching process. The method includes patterning the hard mask layer using the etch mask layer to gradually form a recess in the hard mask layer, the recess having a depth greater than a width of a top surface of a first feature of the etch mask layer, by performing the etching process. The etching process includes alternating between: depositing, using a first plasma, a silicon-containing protective layer over the etch mask layer and the hard mask layer such that the protective layer covers exposed surfaces of the hard mask layer; and subsequently etching, using a second plasma that comprises oxygen, the hard mask layer to form an incremental portion of the recess.

Forming a semiconductor device using a protective layer

A method which includes providing a substrate having a source/drain region and an etch stop layer on the source/drain region. A plasma etching process is performed using an etching gas that removes the etch stop layer and forms a sacrificial oxide capping layer on the source/drain region. The sacrificial oxide capping layer is then from the source/drain region.

Sacrificial capping layer for contact etch

An exemplary method of forming a semiconductor device includes forming, in a substrate, an active region protruding vertically from a major surface of the substrate, the active region including a semiconductor source-drain (S/D) region and a first 3-D channel structure, the S/D region physically contacting the first 3-D channel structure, and forming an opening extending into the S/D region, the opening having a depth greater than half of a height of the first 3-D channel structure; and forming a metallic plug in the opening, the metallic plug making electrical contact with the S/D region.

Recessed contact structures and methods

In certain embodiments, a method for processing a semiconductor substrate includes receiving a semiconductor substrate that includes a nitride etch stop layer aligned to a gate electrode and a metal-based etch stop layer aligned to a source/drain contact region. The method further includes selectively etching the metal-based etch stop layer, to remove the metal-based etch stop layer and expose a surface of the source/drain contact region, by exposing the semiconductor substrate to a plasma formed in a gas comprising a corrosive material and fluorocarbon.

Contact openings in semiconductor devices

Methods and improved process flows are provided herein for forming self-aligned contacts using spin-on silicon carbide (SiC). More specifically, the disclosed methods and process flows form self-aligned contacts by using spin-on SiC as a cap layer for at least one other structure, instead of depositing a SiC layer via plasma vapor deposition (PVD), chemical vapor deposition (CVD), atomic layer deposition (ALD), etc. The other structure may be a source and drain contact made through the use of a trench conductor. By utilizing spin-on SiC as a cap layer material, the disclosed methods and process flows avoid problems that typically occur when SiC is deposited, for example by CVD, and subsequently planarized. As such, the disclosed methods and process flows improve upon conventional methods and process flows for forming self-aligned contacts by reducing defectivity and improving yield.

Methods for forming self-aligned contacts using spin-on silicon carbide

A semiconductor device structure includes a dielectric layer formed on a silicon substrate, an amorphous carbon layer (ACL) formed on the dielectric layer, and a charge dissipation layer formed between the ACL and the dielectric layer. The charge dissipation layer is formed from a material having a resistivity lower than the resistivity of the ACL. Methodologies to fabricate the semiconductor device structure are also disclosed and include forming the dielectric layer on the silicon substrate, forming the charge dissipation layer on the dielectric layer, and forming the ACL on the charge dissipation layer. Alternative semiconductor device structures and fabrication methodologies are also disclosed.

Technologies for high aspect ratio carbon etching with inserted charge dissipation layer

A method for forming a device includes forming a hole pattern in a resist layer disposed over a substrate. The substrate includes contact regions disposed over a major surface of the substrate and a dielectric layer disposed over the contact regions. The resist layer is disposed over the dielectric layer and the hole pattern includes through openings in the resist layer that are aligned with the contact regions. The through openings include a first through opening having a first critical dimension and a second through opening having a second critical dimension greater than the first critical dimension. The method includes modifying the hole pattern by depositing a material including silicon within the through openings by exposing the hole pattern to a first plasma generated from a gas mixture including SiCland hydrogen, and then etching holes in the dielectric layer through the modified hole pattern, exposing the contact regions.

Forming contact holes with controlled local critical dimension uniformity

A method for processing a substrate includes performing a cyclic plasma process including a plurality of cycles, each cycle of the plurality of cycles including purging a plasma processing chamber including the substrate with a first deposition gas including carbon. The substrate includes a first layer including silicon and a second layer including a metal oxide. The method further includes exposing the substrate to a first plasma generated from the first deposition gas to selectively deposit a first polymeric film over the first layer relative to the second layer; purging the plasma processing chamber with an etch gas including fluorine; and exposing the substrate to a second plasma generated from the etch gas to etch the second layer.

Cyclic plasma processing

Improved process flows and methods are provided herein for forming a passivation layer on sidewall surfaces of openings formed in an amorphous carbon layer (ACL) to avoid bowing during an ACL etch process. More specifically, improved process flows and methods are provided to form a silicon-containing passivation layer on sidewall surfaces of the openings created within the ACL without utilizing atomic layer deposition (ALD) techniques or converting the silicon-containing passivation layer to an oxide or a nitride. As such, the improved process flows and methods disclosed herein may be used to protect the sidewall surfaces of the ACL and prevent bowing during the ACL etch process, while also reducing processing time and improving throughput.

Non-atomic layer deposition (ALD) method of forming sidewall passivation layer during high aspect ratio carbon layer etch

A method for processing a substrate includes performing a cyclic process including a plurality of cycles, where the cyclic process includes: forming, in a plasma processing chamber, a passivation layer over sidewalls of a recess in a carbon-containing layer, by exposing the substrate to a first gas including boron, silicon, or aluminum, the carbon-containing layer being disposed over a substrate, purging the plasma processing chamber with a second gas including a hydrogen-containing gas, an oxygen-containing gas, or molecular nitrogen, and exposing the substrate to a plasma generated from the second gas, where each cycle of the plurality of cycles extends the recess vertically into the carbon-containing layer.

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Watervliet, NY, United States of America

Andrew W Metz