Microsoft Technology Licensing, LLC

Andrew L Bliss

John Lee Rapp

Robert George Atkinson

Antony S Williams

Craig C Peeper

Philip J Lafornara

Andre F Vachon

Michael Vincent Oneppo

Alexander G Tilles

Philip Ljubicich

Mark M Lacey

Yosseff Levanoni

Weirong Zhu

Lingli Zhang

Yi Meng

Matthew Uyttendaele

Vance Palmer Morrison

Sean Edwin Trowbridge

Neill Michael Clift

Reiner Fink

Narayanan Ganapathy

Eric A LeVine

Kyle R Johns

Gerald Francis Maffeo

William Hunter Hudson

John D Service

Kshitiz K Sharma

Shai Hinitz

Geoff Pease

Jing Shan

John L Rapp

Allocation of memory registers for shaders by a processor is described herein. For each shader, registers are allocated based on the shader's level of complexity. Simpler shader instances are restricted to a smaller number of memory registers. More complex shader instances are allotted more registers. To do so, developers' high level shading level (HLSL) language includes template classes of shaders that can later be replaced by complex or simple versions of the shader. The HLSL is converted to bytecode that can be used to rasterize pixels on a computing device.

Dynamic subroutine linkage optimizing shader performance

The present invention extends to methods, systems, and computer program products for emulating pointers. Pointers can be emulated by replacing the pointers with a &#x3c;variable#, offset&#x3e; pair and replacing each dereference site with a switch on the tag and a switch body that executes the emulated pointer access on the corresponding variable the pointer points to. Data flow optimizations can be used to reduce the number of switches and/or reduce the number of cases which need be considered at each emulated pointer access sites.

Emulating pointers

The present invention extends to methods, systems, and computer program products for reconstructing program control flow. Embodiments include implementing or morphing a control flow graph ('CFG') into an arbitrary loop structure to reconstruct (preserve) control flow from original source code. Loop structures can be optimized and can adhere to target platform constraints. In some embodiments, C++ source code (a first higher level format) is translated into a CFG (a lower level format). The CFG is then translated into High Level Shader Language ('HLSL') source code (a second different higher level format) for subsequent compilation into SLSL bytecode (that can then be executed at a Graphical Processing Unit (&#x201c;GPU&#x201d;)). The control flow from the C++ source code is preserved in the HLSL source code.

Reconstructing program control flow

Systems, methods, and computer storage media having computer-executable instructions embodied thereon determine whether an output value of a dependency graph has a particular characteristic. In one embodiment, to make this determination, a dependency graph is generated that illustrates external and internal nodes, in addition to their dependency to one another. External nodes, or those nodes that do not depend on other nodes, are analyzed to determine whether they have a particular characteristic. Depending on the operation associated with the characteristic, it may then be determined whether the output value of the dependency graph also has that characteristic.

Characteristic determination for an output node

A system and method to facilitate communication between a user interface and an associated process is disclosed. A first thread is associated with the user interface and a second thread is associated with the process for implementing requests by the user interface. At least one state buffer is operable to store state data for controlling ownership to the state buffer by the first and second threads for communicating data between the first and second threads. The architecture may be used in connection with a debugging system, such as to facilitate responsive interaction between the GUI and the associated debugging system.

Threading and communication architecture for a graphical user interface

A system, method and interface for consistently capturing kernel resident information are provided. An operating system architecture includes user mode modules and kernel mode applications. A user mode module initiates a kernel mode information request through an application program interface identifying one or more process threads of interest. A kernel mode module captures information corresponding to standard kernel mode information and corresponding to the specifically identified process threads. The information is returned in a pre-allocated buffer.

System and method for capturing kernel-resident information

A large portion of software bugs are related to hangs. Analyzing and diagnosing hang-related bugs involves capturing data from a hung program and extracting attributes from the captured data. Extracting attributes from the capture data provides a scheme to determine relevant characteristics of the hang. Moreover, the extracted attributes may be compared to known issues and, based on that comparison, a bug may be classified as known or unknown. Alternatively, triage may be performed on the client computing device in order to determine the potential cause of the hang event. Once the potential cause of the hang event has been determined, troubleshooting steps may be performed on the client computing device to quarantine it. Ultimately, if the hang-inducing bug is known, a user may be provided with a solution to the bug. Alternatively, if the bug is unknown, implementations of the invention send the captured data to be analyzed and fixed by the software's provider.

Automatic root cause analysis and diagnostics engine

A system and method for facilitating cross-process access into a managed code process is useful in an embodiment of the invention for debugging managed code without perturbing the process being accessed or requiring the code under test to be running during debugging. A compiler according to an embodiment of the invention is used to produce mirror code wherein in-process pointers have been replaced with cross-process pointers in order to mirror the address space of the process under test to the address space of the mirror code process. In a further embodiment, the mirror code process is modified not only to allow but also to optimize the cross-process access.

Techniques for managed code debugging

A directed graph includes a plurality of containers, where each container has a type value and is instantiated based on one of a plurality of container types. Each action as instantiated includes an action method table comprising a plurality of action methods. Each action when traversing the directed graph employs the type value of an encountered container as an offset into the action method table thereof to select the action method to be executed on the encountered container. During run-time and prior to traversing the directed graph, an action is instantiated if not already instantiated, and the method table of the action is expanded and filled in based on any new container types in the system.

Extensible actions and container types in an extensible scene graph system

A plurality of actions are applied to a directed graph, where the directed graph has a plurality of nodes. A node in the directed graph is traversed to, and an specific method for each of the plurality of actions is performed on the traversed-node. The traversing and performing are repeated until all nodes in the directed graph have been traversed to. Only a single traversal of the directed graph need be performed to apply all of the actions to the directed graph. The plurality of the actions are in the form of a chain. Each action has an action object pointer, and the actions include a base action at a tail end of the chain and at least one chain action at a head end of the chain. The action object pointer of each chain action points to an immediately adjacent action toward the tail end of the chain, and the action object pointer of the base action points to the chain action at the head end of the chain.

Chaining actions for a directed graph

A method and system for interfacing an application program with a compound document storage system. The present invention provides an interface which an application program uses to manipulate compound documents. In a preferred embodiment, this interface is implemented in a multilayered architecture. The first layer provides methods which an application program uses to access a compound document using the functions of the second layer. The second layer maps requests to store data in the compound document to a storage format using the functions of the third layer. The third layer maps requests to write to a file to an arbitrary storage medium.

Method and system for storing and accessing data in a compound document

Method and system for storing data objects using a small object data

Growing community of inventors

Redmond, WA, United States of America

Andrew L Bliss