International Business Machines Corporation

Globalfoundries Inc.

Andreas Huber

Anand Haridass

Hubert Harrer

Thomas-Michael Winkel

Roger Donell Weekly

Jochen Supper

Daniel Douriet

Bruno Michel

Thomas J Brunschwiler

Harry S Barowski

Stephan Paredes

Tim Niggemeier

Harald Huels

Colm Brian O'Reilly

Thomas Strach

Bruce John Chamberlin

Bao G Truong

Erich Klink

Jonas R Weiss

Roger F Dangel

Norbert M Meier

Stefano Sergio Oggioni

Roland Frech

Wiren Dale Becker

Dierk Kaller

Bao Gia-Harvey Truong

George A Katopis

Philip S Honsinger

Bernd Garben

Martin Kindscher

Andreas Rebmann

A system for manufacturing a product includes a mating connector connected to solder pins to provide an electrical conducting path, the solder pins being aligned against solder pads so that each solder pin is thermally and electrically connected to its corresponding solder pad by a solder paste bead. The system also includes a controller to adjust electrical resistive heating of a solder paste bead during a soldering process according to a temperature of the solder paste bead. A method of manufacturing a product includes aligning the solder pins against the solder pads, connecting the mating connector to the solder pins, and heating a solder paste bead by an electrical resistive heating, the solder paste bead undergoing a soldering process, where a temperature of the solder paste bead is being evaluated and the electrical resistive heating is adjusted according to the temperature of the solder paste bead.

Manufacturing a product using a soldering process

The invention relates to a method for embedding a discrete electronic device in a chip module. The chip module comprises a multilayer substrate which comprises a plurality of electrically conductive layers stacked above each other and an electrically non-conductive layer arranged between each pair of electrically conductive layers. The chip module is configured to receive one or more chips to be mounted onto a top surface thereof. Each electrically conductive layer comprises one or more electrically conductive structures. A recess is provided in a side surface of the chip module. The discrete electronic device is inserted into the recess. A first electrically conductive connection between a first electrical contact of the discrete electronic device and a first electrically conductive structure is established. Further, a second electrically conductive connection between a second electrical contact of the discrete electronic device and a second electrically conductive structure is established.

Discrete electronic device embedded in chip module

A method for embedding a discrete electrical device in a printed circuit board (PCB) is provided, which includes: providing a vertical via as a blind hole from a horizontal surface of the PCB to a conductive structure in a first layer, the first layer being one layer of a first core section of a plurality of core sections vertically arranged above each other, each core section including lower and upper conductive layers, and a non-conductive layer in between; inserting the electrical device into the via, with the device extending within at least two of the core sections; establishing a first electrical connection between a first device contact and the conductive structure in the first layer; and establishing a second electrical connection between a second device contact and a second layer, the second layer being one of the conductive layers of a second horizontal core section.

Method for embedding a discrete electrical device in a printed circuit board

Embedding a discrete electrical device in a printed circuit board (PCB) includes: providing a vertical via as a blind hole from a horizontal surface of the PCB to an electrically conductive structure in a first layer, the first layer being one layer of a first core section of a plurality of core sections vertically arranged above each other, each core section including lower and upper conductive layers, and a non-conductive layer in between; inserting the electrical device into the via, with the device extending within at least two of the core sections; establishing a first electrical connection between a first electrical device contact device and the electrically conductive structure in the first layer; and establishing a second electrical connection between a second electrical device contact and a second layer, the second layer being one of the electrically conductive layers of a second horizontal core section.

Embedding a discrete electrical device in a printed circuit board

Manufacturing a product, wherein the product includes a first part and a second part, wherein the first part includes solder pins and the second part includes solder pads, wherein each of the solder pins has the matching solder pad, wherein each of the solder pads is covered by a matching solder paste bead. Aligning the solder pins against the solder pads in a way that each pair of the solder pin and the matching solder pad is thermally and electrically connected by the matching solder paste bead. Connecting a mating connector to the first part, wherein the mating connector is operable for providing a part of an electrical conducting path. Heating at least one of the solder paste beads by an electrical resistive heating, wherein the electrical resistive heating is generated by an electrical current flowing through the electrical conducting path.

A computer program product or hardware description language ('HDL') design structure in a computer-aided design system for generating a functional design model of an integrated circuitry structure including generating a functional representation of at least first and second regions of the integrated circuitry structure, generating a functional representation of an optical layer comprising optical waveguides, and generating a functional representation of a heat-conductive material for transferring heat from at least the second region through the optical layer to a heat sink.

Transferring heat through an optical layer of integrated circuitry

An integrated circuitry structure includes at least first and second regions. An optical layer includes optical waveguides. A heat-conductive material transfers heat from at least the second region through the optical layer to a heat sink.

A method in a computer-aided design system for generating a functional design model of an integrated circuitry structure including generating a functional representation of at least first and second regions of the integrated circuitry structure, generating a functional representation of an optical layer comprising optical waveguides, and generating a functional representation of a heat-conductive material for transferring heat from at least the second region through the optical layer to a heat sink.

An integrated circuit coupling device includes an integrated circuit package; and an optical data transmission medium connected to the integrated circuit package, and comprising a movable coolant, adapted to remove heat from the integrated circuit package, in operation.

Integrated circuit package connected to an optical data transmission medium using a coolant

An integrated circuit coupling device includes an integrated circuit package with N integrated circuit layers (L-L) arranged as a 3D stack; and a data transmission medium with n data transmission layers (l-l), wherein n&#x2267;1 and N&#x2267;2, and wherein the N integrated circuit layers are electrically connectable to the n data transmission layers.

Integrated circuit package connected to a data transmission medium

A technique for routing signal traces in an electronic package design includes extracting near-end and far-end crosstalk values for traces and vias from a model of the electronic package design. The extracted values are then length-normalized and the normalized values are allocated to coupling factors of a cost-function. A first bus routing for the electronic package design is performed to provide a first routed design. Length segments from the first routed design are extracted and inserted in the cost-function. Crosstalk for each bus net is accumulated using the cost-function. In response to the accumulated crosstalk being less than a determined limit, the first routed design is saved. In response to the accumulated crosstalk being greater than the determined limit, an additional bus routing for the electronic package design is performed.

Growing community of inventors

Leonberg, Germany

Andreas Huber