Infineon Technologies Ag

Infineon Technologies Austria Ag

Alice Pei-Shan Hsieh

Hans-Joachim Schulze

Frank Dieter Pfirsch

Matteo Dainese

Christian Philipp Sandow

Caspar Leendertz

Manfred Pfaffenlehner

Markus Bina

Holger Huesken

Philip Christoph Brandt

Viktoryia Lapidus

A semiconductor body having first and second vertically spaced apart surfaces is formed. A gate trench that vertically extends from the first surface of the semiconductor body towards the second surface is formed. A gate electrode and a gate dielectric are formed in the gate trench. The gate dielectric electrically insulates the gate electrode from adjacent semiconductor material. A doped superjunction region vertically extending from a bottom of the gate trench towards the second surface of the semiconductor body is formed. The doped superjunction region includes first, second, and third doped pillars vertically extending from the first surface of the first semiconductor layer and directly adjoining one another. The second pillar is laterally centered between the first and third pillars and has an opposite conductivity type as the first and third pillars.

Power semiconductor device with charge balance design

A power semiconductor device includes a semiconductor substrate with an edge termination region between an active region and a lateral rim. Non-metallic electrodes extend in the edge termination region on a front side of the substrate, and include at least three spaced apart non-metallic electrodes. One non-metallic electrode is an inner non-metallic electrode having an inner edge. Another non-metallic electrode is an outer non-metallic electrode having an outer edge. The shortest distance between the inner edge of the inner non-metallic electrode and the outer edge of the most non-metallic electrode is defined as distance p. Each non-metallic electrode is electrically connected to a respective doping region of the substrate by at least two respective metallic plugs each extending through a respective first opening formed in an electrically insulating bottom layer. The shortest distance d between any two metallic plugs of different non-metallic electrodes is larger than the distance p.

Power semiconductor device

A semiconductor device includes a transistor. The transistor includes a drift region of a first conductivity type in a semiconductor substrate having a first main surface, a body region of a second conductivity type between the drift region and the first main surface, and a plurality of trenches in the first main surface and patterning the semiconductor substrate into a plurality of mesas including a first mesa and a dummy mesa. The plurality of trenches includes at least one active trench. The first mesa is arranged at a first side of the active trench, and the dummy mesa is arranged at a second side of the active trench. A gate electrode is arranged in the active trench, and a source region of the first conductivity type is in the first mesa. A one-sided channel of the transistor is configured to be formed in the first mesa.

Semiconductor device comprising a barrier region

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Munich, Germany

Alice Pei-Shan Hsieh