International Business Machines Corporation

Other

Alfred K Wong

Lars W Liebmann

Richard A Ferguson

Scott Marshall Mansfield

Mark Alan Lavin

Richard Stephan Wise

Timothy A Brunner

James A Culp

Ioana C Graur

Gerhard Kunkel

Scott Josef Bukofsky

Young O Kim

David S O'Grady

Xiaoming Yin

Don Wheeler

Tim Wiltshire

A method for generating an optical proximity correction (OPC) model includes generating a set of correction rules for a wafer design containing at least one of lines and assist features, determining a set of corrections that need to be made over a range of sizes and spaces of the lines and assist features based on the set of correction rules, and creating an optical proximity correction model for correcting the wafer design based on the set of corrections.

Method for generating a proximity model based on proximity rules

A technique is described, based on concepts of halftone printing, for controlling feature dimensions in a printed image at increments smaller than the smallest addressable unit of the template used to produce that image. Accordingly, photomasks may be fabricated to yield images with sizes differing from a nominal width by increments which are small fractions of the minimum template size or pixel size. A template fabricated according to this technique includes a feature having one or more edges, and a first array and a second array of shapes (protrusions or indentations) disposed on the edges. The first and second arrays have respective segmentation periods; the first and second segmentation periods are different. Each array is formed of a plurality of identical shapes repeating at every corresponding segmentation period, each shape having a predetermined length and a predetermined width. The shapes (protrusions or indentations) in the first array and the second array may have different lengths, in addition to the two arrays having different segmentation periods; a line feature on a template will thus appear asymmetric with respect to both the length and period of the shapes along the edges of the feature.

Asymmetric halftone biasing for sub-grid pattern adjustment

A method of creating a pattern for a mask adapted for use in lithographic production of features on a substrate. The method comprises initially providing a mask pattern of a feature to be created on the substrate using the mask. The method then includes establishing target dimensional bounds of the pattern, determining simulated achievable dimensional bounds of the pattern, comparing the target dimensional bounds of the pattern to the simulated achievable dimensional bounds of the pattern, and determining locations where the simulated achievable dimensional bounds of the pattern differ from the target dimensional bounds of the pattern. In its preferred embodiment, the feature is an integrated circuit to be lithographically produced on a semiconductor substrate.

Process window based optical proximity correction of lithographic images

Optical proximity correction (OPC) and assist feature rules are generated using a process window (PW) analysis. A reference pitch is chosen and the mask bias is found that optimizes the process window. This can be done using standard process window analysis or through a weighted process window (WPW) analysis which accounts for focus and dose distributions that are expected in a real process. The WPW analysis gives not only the optimum mask bias, but also the center focus and dose conditions for the optimum process centering. A series of other pitches and mask biases are then analyzed by finding the common process window with the reference pitch. For the standard PW analysis, a common process window is found. For the WPW analysis, the WPW is computed at the center focus and dose conditions found for the reference pitch. If mask or lens errors are to be accounted for, then multiple structures can be included in the analysis. Once the common process windows for the mask features of interest have been computed, functional fits to the data can be found. Once the functional forms have been found for each of the OPC parameters, the rules table can be determined by solving for the spacings of interest in the design.

Method to determine optical proximity correction and assist feature rules which account for variations in mask dimensions

The present invention relates generally to a method for lithographically printing a mask pattern on a substrate, in particular a semiconductor substrate, wherein the mask pattern includes features with diverse pitches. These features may include device features such as vias or contact holes and lines in integrated circuits. The method comprises splitting the mask pattern into a plurality of masks, wherein one or more of the masks contains relatively tightly nested features and one or more of the masks contains relatively isolated features. Each of the plurality of masks is then successively exposed on a photoresist layer on the substrate. For each exposure, the exposure conditions, photoresist layer, other thin films layers, etching process, mask writing process, and/or mask pattern bias may be optimized for the tightly nested feature pattern or isolated feature pattern.

Method and apparatus for lithographically printing tightly nested and isolated device features using multiple mask exposures

An optical alignment system used in the manufacture of semiconductor integrated circuits determines and adjusts the alignment between features which have been formed on a semiconductor wafer and features on a mask which is being projected onto the semiconductor wafer. Light which illuminates the semiconductor wafer is scattered and diffracted into a dark-field detector system. This results in the generation of electrical signals which are used to position the mask relative to the semiconductor wafer. The use of polarized light in the present system results in an increase in the magnitude of the desired signals and a decrease in the magnitude of the spurious signals. To improve the quality of the signals, the angle of polarization of the light is adjusted to a specific relationship with respect to the geometry of the alignment marks on the semiconductor wafer.

Overlay alignment system using polarization schemes

A method for exposing a workpiece in a dual exposure step-and-repeat process starts by forming a design for a reticle mask. Deconstruct the design for the reticle mask by removing a set(s) of the features that are juxtaposed to form hollow polygonally-shaped clusters with a gap in the center. Form unexposed resist on the workpiece. Load the workpiece and the reticle mask into the stepper. Expose the workpiece through the reticle mask. Reposition the workpiece by a nanostep. Then expose the workpiece through the reticle mask after the repositioning. Test whether the plural exposure process is finished. If the result of the test is NO the process loops back to repeat some of the above steps. Otherwise the process has been completed. An overlay mark is produced by plural exposures of a single mark. A dead zone is provided surrounding an array region in which printing occurs subsequent to exposure in an original exposure. Alternatively, the workpiece can be fully exposed first by stepping a series of full steps, then going back to the starting position, making a nanostep to reset the starting position and re-exposing from the reset starting position in the same way with full steps from the nanostepped position. The clusters may be in the shape of a hexagon or a diamond.

Multiple exposure process for formation of dense rectangular arrays

A method for reducing lens aberrations sensitivity and proximity effects of alternating phase shifted masks is described. The critical features of a chip design layout are first identified. Multiple, narrow phase regions and auxiliary phase transitions, which provide additional opaque features, are then formed alongside the critical features such that a grating pattern of substantially uniform pitch is printed. Together with a complementary trim mask, the circuit pattern so delineated has reduced sensitivity to lens aberrations and proximity effects.

Optimized alternating phase shifted mask design

A method for detecting phase features or phase defects on photomasks for optical lithography is described. The asymmetric imaging behavior through focus of defects or features with a phase other than 0&deg; or 180&deg; is used to distinguish them from other features on the mask. The mask is inspected at equally spaced positions about an optimum focus in both positive and negative directions. The images are subtracted from one another to produce a differential image of the mask. While opaque features as well as transmitting features at 0&deg; and 180&deg; behave identically at positive and negative defocus, thus leading to a zero-valued differential image, the focus asymmetry of phase defects and features produces a non-zero differential image from which these phase defects and features can be located. By comparing the locations on the mask for which a non-zero differential image is obtained with the designed data for the mask, the phase defects can be sorted from the phase features and the absence of phase features can be detected. Additional image processing can be applied to verify the integrity of the phase features. The differential image inspection technique can be implemented on existing optical inspection tools by employing a two-pass inspection performed at positive and negative defocus in sequence. In addition, a new apparatus with parallel inspection optics is described for inspecting the mask at positive and negative focus simultaneously.

Detection of phase defects on photomasks by differential imaging

A method of simulating aerial images of large mask areas obtained during the exposure step of a photo-lithographic process when fabricating a semiconductor integrated circuit silicon wafer is described. The method includes the steps of defining mask patterns to be projected by the exposure system to create images of the mask patterns; determining an appropriate sampling range and sampling interval; generating a characteristic matrix describing the exposure system; inverting the matrix to obtain eigenvalues as well as the eigenvectors (or kernels) representing the decomposition of the exposure system; convolving the mask patterns with these eigenvectors; and weighing the resulting convolution by the eigenvalues to form the aerial images. The method is characterized in that the characteristic matrix is precisely defined by the sampling range and the sampling interval, such that the sampling range is the shortest possible and the sampling interval, the largest possible, without sacrificing accuracy. The method of generating aerial images of patterns having large mask areas provides a speed improvement of several orders of magnitude over conventional approaches.

Kernel-based fast aerial image computation for a large scale design of integrated circuit patterns

A process for creating and verifying a design of phase-shifted masks utilizing at least one phase shift region employing a computer-aided design system. A chip design is provided. A phase-shift mask design capable of producing the chip design is created. Features in a design of the phase-shifted mask that require phase shifting are located. Uncolored phase regions are created on opposite sides of the features. Proper phase termination of the phase regions is ensured based upon space constraints of a phase-shifted mask technique utilized. Phases are determined for the phase regions. Whether coloring errors and un-phase-shiftable design features exist is determined. Mask process specific overlaps and expansions are applied to the mask design to prepare designed data levels for mask manufacture. A residual phase edge image removal design is derived.

Phase shifted mask design system, phase shifted mask and VLSI circuit

A method for determining if an undesirable feature on a photomask will adversely affect the performance of the semiconductor integrated circuit device that the mask is being used to create. The method includes inspecting the photomask for undesirable features and analyzing the designed features close to the defects. This analysis is performed on lithographic images that represent the image that is transferred onto the semiconductor wafer by the lithography process. This analysis takes into account the effect of variations that are present in the lithography process. Through knowledge of the effects of variations in mask critical dimension of a feature on the lithographic image of that feature, the analysis results in the assignment of an equivalent critical dimension error to the defect. This equivalent critical dimension error is then compared to the mask critical dimension error specification to determine whether or not the defect will adversely affect the device.

Method of determining the printability of photomask defects

A two-step method for eliminating transmission errors in alternating phase-shifting masks is described. Initially, the design data is selectively biased to provide a coarse reduction in the inherent transmission error between features of different phase, size, shape, and/or location. During fabrication of the mask with the modified data, residual transmission errors are then eliminated via the positioning of the edges of the etched-quartz trenches which define the phase of a given feature to a set location beneath the opaque chrome film. Application of feedback, in which the aerial image of the mask is monitored during the positioning of the etched-quartz edges, provides additional and precise control of the residual transmission error.

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Hong Kong, China

Alfred K Wong