Infineon Technologies Ag

Infineon Technologies Austria Ag

Alexander Roth

Alexander Heinrich

Catharina Wille

Juergen Hoegerl

Olaf Hohlfeld

Andreas Grassmann

Martin Mayer

Hans-Joachim Schulze

Edward Fuergut

Ivan Nikitin

Angela Kessler

Hans-Joerg Timme

Stefan Schwab

Franz Zollner

Timo Bohnenberger

Karina Rott

A layer structure includes a first layer including at least one material selected from a first group consisting of nickel, copper, gold, silver, palladium, tin, zinc, platinum, and an alloy of any of these materials; a third layer including at least one material selected from a second group consisting of nickel, copper, gold, palladium, tin, silver, zinc, platinum, and an alloy of any of these materials; and a second layer between the first layer and the third layer. The second layer consists of or essentially consists of nickel and tin. The second layer includes an intermetallic phase of nickel and tin. Methods of forming the layer structure, a chip package and a chip arrangement are also described.

Method of forming an intermetallic phase layer with a plurality of nickel particles

A semiconductor device package comprises an electrically conductive carrier, a semiconductor die disposed on the carrier, an encapsulant encapsulating part of the carrier and the semiconductor die, an electrically insulating and thermally conductive interface structure, in particular covering an exposed surface portion of the carrier and a connected surface portion of the encapsulant, wherein the interface structure comprises a glass transition temperature in a range between −40° C. to 150° C.

Semiconductor device package comprising a thermal interface material with improved handling properties

A DBC substrate for power semiconductor devices includes a ceramic workpiece of a non-oxide ceramic having first and second opposing main sides, the ceramic workpiece having a thickness of 10 μm or more measured between the first and second main sides, a copper-containing layer disposed over the first main side, the copper-containing layer having a thickness of 5 μm or more, and an intermediate layer comprising AlOdisposed between the ceramic workpiece and the copper-containing layer.

DBC substrate for power semiconductor devices, method for fabricating a DBC substrate and power semiconductor device having a DBC substrate

A pre-soldered circuit carrier includes a carrier having a metal die attach surface, a plated solder region on the metal die attach surface, wherein a maximum thickness of the plated solder region is at most 50 μm, the plated solder region has a lower melting point than the first bond pad, and the plated solder region forms one or more intermetallic phases with the die attach surface at a soldering temperature that is above the melting point of the plated solder region.

Pre-plating of solder layer on solderable elements for diffusion soldering

A layer structure includes a first layer including at least one material selected from a first group consisting of nickel, copper, gold, silver, palladium, tin, zinc, platinum, and an alloy of any of these materials; a third layer including at least one material selected from a second group consisting of nickel, copper, gold, palladium, tin, silver, zinc, platinum, and an alloy of any of these materials; and a second layer between the first layer and the third layer. The second layer consists of or essentially consists of nickel and tin. The second layer includes an intermetallic phase of nickel and tin.

Layer structure with an intermetallic phase layer and a chip package that includes the layer structure

A method for producing a metal-ceramic substrate with a plurality of electrically conductive vias includes: attaching a first metal layer in a planar manner to a first surface side of a ceramic layer; after attaching the first metal layer, introducing a copper hydroxide or copper acetate brine into a plurality of holes in the ceramic layer delimiting a via, to form an assembly; converting the copper hydroxide or copper acetate brine into copper oxide; subjecting the assembly to a high-temperature step above 500&#xb0; C. in which the copper oxide forms a copper body in the plurality of holes; and after converting the copper hydroxide or copper acetate brine into the copper oxide, attaching a second metal layer in a planar manner to a second surface side of the ceramic layer opposite the first surface side. The copper body produces an electrically conductive connection between the first and the second metal layers.

Method for producing a metal-ceramic substrate with electrically conductive vias

A semiconductor package includes a semiconductor die, an encapsulant body of electrically insulating material that encapsulates the semiconductor die, a thermal conduction plate comprising an outer surface that is exposed from the encapsulant body, a region of thermal interface material interposed between the thermal conduction plate and the semiconductor die, the region of thermal interface material being a liquid or semi-liquid, and a barrier that is configured to prevent the thermal interface material of the region from flowing laterally across the barrier.

Semiconductor package with barrier to contain thermal interface material

A method for producing a metal-ceramic substrate with electrically conductive vias includes: attaching a first metal layer in a planar manner to a first surface side of a ceramic layer; after attaching the first metal layer, introducing a copper hydroxide or copper acetate brine into holes in the ceramic layer delimiting a via, to form an assembly; converting the copper hydroxide or copper acetate brine into copper oxide; subjecting the assembly to a high-temperature step above 500&#xb0; C. in which the copper oxide forms a copper body in the holes; and after converting the copper hydroxide or copper acetate brine into the copper oxide, attaching a second metal layer in a planar manner to a second surface side of the ceramic layer opposite the first surface side. The copper body produces an electrically conductive connection between the first and the second metal layers.

Method for producing a metal-ceramic substrate with at least one via

A method is disclosed for producing a power semiconductor module that includes a substrate, at least one semiconductor body, a connecting element and a contact element. The method includes: arranging the substrate in a housing having walls; at least partly filling a capacity formed by the walls of the housing and the substrate with an encapsulation material; hardening the encapsulation material to form a hard encapsulation; and closing the housing, wherein the contact element extends from the connecting element through an interior of the housing and through an opening in a cover of the housing to an outside of the housing in a direction perpendicular to a first surface of a first metallization layer of the substrate.

Method for producing power semiconductor module arrangement

A solder material may include nickel and tin. The nickel may include first and second amounts of particles. A sum of the particle amounts is a total amount of nickel or less. The first amount is between 5 at % and 60 at % of the total amount of nickel. The second amount is between 10 at % and 95 at % of the total amount of nickel. The particles of the first amount have a first size distribution, the particles of the second amount have a second size distribution, 30% to 70% of the first amount have a particle size in a range of about 5 &#x3bc;m around a particle size the highest number of particles have according to the first size distribution, and 30% to 70% of the second amount have a particle size in a range of about 5 &#x3bc;m around a particle size the highest number of particles have according to the second size distribution.

Solder material with two different size nickel particles

An integrated circuit package that includes a leadframe and a mold compound encapsulating at least a portion of the leadframe. The mold compound includes a cavity open at a bottom surface of the mold compound that exposes a bottom surface of the leadframe. A thermally conductive and electrically insulating isolation layer is locked within the bottom cavity of the mold compound and contacts the bottom surface of the leadframe.

Leadframe package with isolation layer

A resin-impregnated boron nitride body includes a polymer-derived boron nitride and a resin. A process for manufacturing such a resin-impregnated boron nitride body includes: polymerizing a boron nitride molecular precursor into a preceramic polymer shaping the preceramic polymer to form an infusible polymer body; submitting the polymer body to a thermal treatment to obtain a boron nitride body; impregnating the boron nitride body with a resin; and curing the resin.

Resin-impregnated boron nitride body and a method for producing a resin-impregnated boron nitride body

A power semiconductor module arrangement includes a substrate arranged in a housing. The substrate includes a first metallization layer arranged on a first side of a dielectric insulation layer and a second metallization layer arranged on a second side of the dielectric insulation layer. At least one semiconductor body is mounted on a first surface of the first metallization layer facing away from the dielectric insulation layer. A connecting element is arranged on and electrically connected to the first surface. A contact element is inserted into and electrically connected to the connecting element, and extends from the connecting element through an interior of the housing and through an opening in the cover of the housing to an outside of the housing in a direction perpendicular to the first surface. A hard encapsulation is arranged adjacent to the first metallization layer and at least partly fills the inside of the housing.

Power semiconductor module arrangement

A method for producing a metal-ceramic substrate with at least one electrically conductive via, in which one metal layer, respectively, is attached in a planar manner to a ceramic plate or a ceramic layer to each of two opposing surface sides of the ceramic layer is provided. The method includes introducing a metal-containing, powdery and/or liquid substance into a hole in the ceramic layer delimiting the via prior to the attachment of both metal layers, or subsequent to the attachment of one of the two metal layers to form an assembly. Prior to the attachment of the other one of the two metal layers, and the assembly is subjected to a high-temperature step above 500&#xb0; C. in which the metal-containing substance wets the ceramic layer at least partially with a wetting angle of less than 90&#xb0;.

A method for producing a metal-ceramic substrate includes attaching a metal layer to a surface side of a ceramic layer, the metal layer being structured into a plurality of metallization regions respectively separated from one another by at least one trench-shaped intermediate space to form conductive paths and/or connective surfaces and/or contact surfaces. The method further includes filling the at least one trench-shaped intermediate space with an electrically insulating filler material, and covering first edges of the metallization regions facing and adjoining the surface side of the ceramic layer in the at least one trench-shaped intermediate space, as well as at least one second edge of the metallization regions facing away from the surface side of the ceramic layer in the at least one trench-shaped intermediate space, by the electrically insulating filler material.

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Zeitlarn, Germany

Alexander Roth