Centurion Patentors as of October 22, 2024

Chao Wei
Engineer, Staff at Qualcomm.
Patent №: 12127216 (October 22, 2024) – Downlink control information for scheduling one or more transport blocks.

The number of transport blocks scheduled by the DCI can be indicated either explicitly with a field or implicitly within the DCI bitstream. The encoding scheme used depends on the coverage enhancement (CE) mode of the user equipment.

Patent №: 12126418 (October 22, 2024) – Inter-stream interference measurement for non-linear precoding techniques. A base station configures different resource types for user equipment (UE) to handle interference when non-linear precoding is used. These resources include one for measuring channel gain, another for non-linear interference from lower-layer data streams, and a third for linear interference from higher-layer data streams. The base station sends reference signals over these resources, allowing the UE to measure both non-linear and linear interference.

Hyoungju Ji
Samsung Electronics Principal Engineer.
Patent №: 12127194 (October 22, 2024) – Method and apparatus for repetitive transmission of downlink control information in network cooperative communications.

This disclosure relates to a communication technique integrating 5G with IoT technology for higher data rates, supporting intelligent services like smart homes, cities, connected cars, healthcare, and more. It specifically focuses on a coverage enhancement method for the PDCCH in a wireless communication system.

Abhishek A Sharma
Advanced Memory Pathfinding at Intel Corporation.
Dr. Sharma received the M.S. and Ph.D. degrees in electrical and computer engineering from Carnegie Mellon University, Pittsburgh, PA, USA, in 2012 and 2015, respectively.
Abhishek has been involved in very large scale integration process modeling, device modeling, and hardware accelerators for image processing.
He received the JRD Tata Fellowship from 2009 to 2010, the CIT Dean’s Fellowship from 2012 to 2013, and the Bradford and Diane Smith Fellowship in Engineering from 2013 to 2014. He received the A.G. Milnes Best Thesis Award in 2016.

Patent №: 12125917 (October 22, 2024) – Thin film transistors having double gates. An integrated circuit structure includes an insulator layer over a substrate, a first gate stack on the insulator layer, and a polycrystalline channel material layer on the first gate stack. A second gate stack is on part of the polycrystalline layer, with conductive contacts on either side of the second gate stack, each on different portions of the channel material layer.

Ming Yang
Dr. Yang received a B.S. from Huaibei Normal University in 2005, an M.S. from Anhui University, Hefei, China, in 2010, and a Ph.D. in electromagnetic field and microwave technology from Anhui University in 2019.
Ming was the Deputy Director of the Department of Electronics and Information Engineering, at Bozhou University.
He was the Laboratory Director of the Key Laboratory of Electronic Information System Simulation and Design, at Bozhou University, in 2020.
Yang is the author and co-author of about 20 scientific papers published in journals and presented in international conferences in the field of antenna design.

Patent №: 12125871 (October 22, 2024) – Light emitting plate, wiring plate and display device. The light-emitting plate has units with a connection line unit and a light-emitting diode (LED) chip. The connection line unit includes electrical contact pairs, where the first and second electrode contacts are connected within each unit. Only one contact pair connects to the LED chip. The first and second electrode contacts are arranged so that at least two first electrode contacts are adjacent, with two first contacts positioned between two-second contacts.