Centurion+ Patent Holders as of January 2, 2024
Zhipin Deng
Senior Media Architect at Intel Corporation.
Zhipin Deng received the B.S. degree and the Ph.D. degree (Hons.) in electronic engineering from the Beijing University of Technology in 2006 and 2012, respectively.
From 2008 to 2012, she was a Joint Ph.D. Student between The Hong Kong Polytechnic University and the Beijing University of Technology, with the support of the joint Ph.D. supervision program for outstanding Mainland students.
In 2012, Zhipin joined Intel China Research Center Ltd., as a Research Scientist, where she worked on developing visual computing algorithms for Intel GPU media pipeline and modeling the video coding techniques of advanced video coding standards, such as HEVC, 3D-HEVC, AV1, MPEG-I, and VVC. In 2019, she joined ByteDance Inc., China
Patent №: 11863762 (January 2, 2024) – Subpicture sub-bitstream extraction improvements, which focus on enhancing video coding, decoding, and transcoding. This patent describes a method for efficiently extracting network abstraction layer (NAL) units from a video bitstream during a sub-bitstream extraction process. By using a specific rule and satisfying a set of conditions, this innovation optimizes sub-bitstream extraction, thereby improving video processing performance.
Alexander Pavlovich Topchy
Principal Researcher at Nielsen.

Patent №: 11863294 (January 2, 2024) – Methods and apparatus for increasing the robustness of media signatures introduce an apparatus capable of selectively boosting or attenuating specific characteristics of a media signal to enhance its robustness. By considering the effect of these modifications on various characteristics over time, the apparatus aims to improve overall media signal quality.
Jam-Wem Lee
EOS/ESD Technical Manager at TSMC
He received his B.S. and Ph.D. degrees in electronics engineering from the National Chiao Tung University, Hsinchu, Taiwan, in 1996 and 2002, respectively.
During this period, he devoted his efforts to improving the reliability and scalability of nanoscaled thin dielectric films.
From 2001 to 2002, he was with the United Microelectronics Corporation, Taiwan, as an Engineer working on the electrostatic discharge (ESD) circuit design. After that, he joined the National Nano Device Laboratories, Hsinchu, as an Associate Researcher for four years.
Since 2007, he has been with the Taiwan Semiconductor Manufacturing Company, Hsinchu, as a Section Manager.
Patent №: 11862968 (January 2, 2024) – Circuit and method for high voltage tolerant ESD protection. This patent unveils an electrostatic discharge (ESD) protection circuit. It encompasses a combination of transistors, along with an ESD clamp, that effectively safeguards against ESD events. Lee’s innovation contributes to enhanced protection for electronic devices from potential damage caused by ESD.
Patent №: 11862960 (January 2, 2024) – Electrostatic discharge (ESD) protection circuit and method of operating the same. This patent focuses on the development of an ESD protection circuit featuring diodes, an ESD clamp circuit, and a conductive structure. This circuit helps prevent ESD-related harm to IO pads, ensuring the integrity and reliability of semiconductor devices.