The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 31, 1977
Filed:
Jun. 13, 1976
Applicant:
Inventors:
Joseph Richard Cavaliere, Hopewell Junction, NY (US);
David Barry Eardley, Stanfordville, NY (US);
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Attorney:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
307251 ; 307205 ;
Abstract
A negative resistance circuit constructed of complementary field effect transistors has several applications. A voltage change at an input to the negative resistance circuit alters the current at the input node in a direction inverse to that normally caused by such a voltage change. The circuit can be used to speed up the charging or the discharging of a circuit node capacitance.
Cavaliere, Joseph. (1977). Delay circuits using negative resistance cmos circuits (U.S. Patent No. T955006). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/T955006
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile