The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 16, 2025
Filed:
May. 15, 2019
Applicant:
Crestron Electronics, Inc., Rockleigh, NJ (US);
Inventor:
Robert Buono, Ringwood, NJ (US);
Assignee:
Crestron Electronics, Inc., Rockleigh, NJ (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 99/00 (2009.01); H03F 3/183 (2006.01); H03F 3/185 (2006.01); H03F 3/217 (2006.01); H03F 3/68 (2006.01); H04R 3/00 (2006.01); H04R 3/04 (2006.01); H04R 3/12 (2006.01);
U.S. Cl.
CPC ...
H03F 3/217 (2013.01); H03F 3/183 (2013.01); H03F 3/185 (2013.01); H03F 3/2171 (2013.01); H03F 3/2173 (2013.01); H03F 3/68 (2013.01); H04R 3/04 (2013.01); H04R 3/12 (2013.01); H03F 2200/03 (2013.01); H03F 2200/171 (2013.01); H03F 2200/351 (2013.01); H03F 2200/78 (2013.01);
Abstract
A multi-channel Class D audio amplifier is provided to substantially reduce channel-to-channel crosstalk by employing in each channel a local triangle ramp generator controlled by a single global digital timing signal. The noise critical timing/integrating capacitor for the triangle ramp generator resides locally in each channel and adjacent to the PWM comparator of that channel and referenced to the local ground of that channel. The amplifier can also include a duty cycle limitation circuit to limit output power availability depending on the impedance of any attached loads (speakers).