The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 2013

Filed:

Aug. 14, 2012
Applicant:

Hyun Jung Kim, Goyang-si, KR;

Inventor:

Hyun Jung Kim, Goyang-si, KR;

Assignee:

658868 N.B. Inc., St. John, New Brunswick, CA;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/82 (2005.12); H01L 43/00 (2005.12);
U.S. Cl.
CPC ...
Abstract

A transistor of a semiconductor memory device including a semiconductor substrate having a plurality of active regions and a device isolation region, a plurality of first and second trench device isolation layers, which are arranged alternately with each other on the device isolation region of the semiconductor substrate, the first trench device isolation layers having a first thickness corresponding to a relatively high step height, and the second trench device isolation layers having a second thickness corresponding to a relatively low step height, a recess region formed in each of the active regions by a predetermined depth to have a stepped profile at a boundary portion thereof, the recess region having a height higher than that of the second trench device isolation layers to have an upwardly protruded portion between adjacent two second trench device isolation layers, a gate insulation layer, and a plurality of gate stacks formed on the gate insulation layer to overlap with the stepped profile of the respective active regions and the protruded portion of the relevant recess region.


Find Patent Forward Citations

Kim, Hyun. (2013). Method for manufacturing a transistor of a semiconductor memory device (U.S. Patent No. RE44532). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/RE44532

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…