The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 01, 2013

Filed:

Jan. 20, 2011
Applicants:

Elroy M. Lucero, San Jose, CA (US);

Daniel J. Lucero, San Jose, CA (US);

Hengyang (James) Lin, San Ramon, CA (US);

Andrew J. Franklin, Santa, CA (US);

Pavel Poplevine, Burlingame, CA (US);

Inventors:

Elroy M. Lucero, San Jose, CA (US);

Daniel J. Lucero, San Jose, CA (US);

Hengyang (James) Lin, San Ramon, CA (US);

Andrew J. Franklin, Santa, CA (US);

Pavel Poplevine, Burlingame, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/07 (2005.12);
U.S. Cl.
CPC ...
Abstract

Anti-pirate circuitry is provided for combating the theft of intellectual property contained with semiconductor integrated circuits. The anti-pirate circuit includes a unique number generator that provides a multi-bit die ID data string that is unique to the integrated circuit associated with the anti-pirate circuit. One time programmable (OTP) EPROM circuitry reads the die ID data string at wafer sort and writes the data content to nonvolatile memory. During a subsequent verification cycle, ID comparator circuitry compares the data string provided by the unique number generator to the stored contents of the nonvolatile memory. If the comparison results in a mismatch between more than a predefined number of bits, then the integrated circuit associated with the anti-pirate circuit is not enabled for operation.


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