The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 2010

Filed:

Mar. 08, 2005
Applicants:

Yasuhiro Uemoto, Otsu, JP;

Katsushige Yamashita, Hirakata, JP;

Takashi Miura, Kyoto, JP;

Inventors:

Yasuhiro Uemoto, Otsu, JP;

Katsushige Yamashita, Hirakata, JP;

Takashi Miura, Kyoto, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/0392 (2005.12);
U.S. Cl.
CPC ...
Abstract

In an SOI (Silicon On Insulator) semiconductor device, a first semiconductor layer overlies a semiconductor substrate so as to sandwich an insulating layer, and second and third semiconductor layers with a different conductivity type from the second semiconductor layer are formed on the surface of the first semiconductor layer. At the interface between the first semiconductor layer and the insulating layer, a fourth semiconductor layer with a different conductivity type from the first semiconductor layer is formed. The fourth semiconductor layer includes an impurity of larger than 3×10/cmso as not to be completely depleted even though a reverse bias voltage is applied between the second and third semiconductor layers.


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