The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 15, 2010
Filed:
Apr. 02, 2003
Frederick J. Kiko, Carlsbad, CA (US);
Frederick J. Kiko, Carlsbad, CA (US);
Pulse Engineering, Inc., San Diego, CA (US);
Abstract
An impedance blocking filter circuit is provided for use in telecommunication systems for interconnecting between incoming telephone lines and customer's terminal equipment so as to unconditionally block impedances above20 KHza desired frequency rangedue to the customer's terminal equipment froman ADSLa DSLnetwork unit and/or home networking interface unit.The filter circuit includes first, second, and third inductors connected in series between a first input terminal and a first common point. A first resistor has its one end connected also to the first common point and its other end connected to a first output terminal. Fourth, fifth and sixth inductors are connected in series between a second input terminal and a second common point. A second resistor has its one end also connected to the second common point and its other end connected to a second output terminal. A capacitor has its ends connected across the first and second common points. In other aspects, the filter circuit also includes switching means for eliminating shunt additive capacitance, correction circuit means reducing significantly return loss, and switch suppression circuit means for eliminating transients.In one exemplary embodiment, the filter circuit is adapted to block impedances above 20 KHz and comprises a series of inductors disposed electrically between respective ones of first and second input terminals and output terminals. First and second switches responsive to loop current are disposed in series with respective capacitors between the series of inductors.