Binary voltage level converter

Abstract

A circuit is provided for converting binary information received at first logic high and logic low voltage levels from circuitry of a first logic family into logic high and logic low voltage levels for use by circuitry of a second logic family, and more particularly to a TTL to CMOS converter. A reference stage is provided having a temperature stable reference potential source. The reference potential controls the output from the reference stage which is applied as one input to an input stage, the other input to this stage being the input binary voltage levels. The reference stage output controls the input stage to generate a control potential, the level of which changes when the input voltage level passes through a value which is substantially equal to the reference potential. The control potential output from the input stage is connected to an output stage to control the state thereof, the output stage generating an output at the second logic high level when in one state and at the second logic low level when in its other state.