The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 12, 2018

Filed:

Jan. 08, 2016
Applicant:

Samsung Electro-mechanics Co., Ltd., Suwon-si, KR;

Inventors:

Kyung-Hwan Ko, Gimhae-si, KR;

Young-Gwan Ko, Seoul, KR;

Jae-Ean Lee, Busan-si, KR;

Jee-Soo Mok, Yongin-si, KR;

Yong-Ho Baek, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/18 (2006.01); H05K 1/11 (2006.01); H05K 3/46 (2006.01); H01L 23/28 (2006.01); H05K 3/28 (2006.01); H05K 1/16 (2006.01);
U.S. Cl.
CPC ...
H05K 1/183 (2013.01); H05K 1/115 (2013.01); H05K 1/182 (2013.01); H05K 3/4697 (2013.01); H01L 2224/14 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/17 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/49109 (2013.01); H01L 2224/73257 (2013.01); H01L 2924/00014 (2013.01); H05K 1/162 (2013.01); H05K 1/185 (2013.01); H05K 3/284 (2013.01); H05K 2201/0919 (2013.01); H05K 2201/09381 (2013.01); H05K 2201/10 (2013.01); H05K 2201/1003 (2013.01); H05K 2201/10007 (2013.01); H05K 2201/10022 (2013.01);
Abstract

A printed circuit board including an electronic component and a method of producing the same are provided. The printed circuit board includes a multilayered substrate including an insulation layer and an inner circuit layer laminated therein, a cavity disposed in the multilayered substrate, a via disposed in the insulation layer and configured to electrically connect the inner circuit layer with another inner circuit layer, a first electronic component inserted in the cavity, and a bump pad disposed on a surface of the cavity facing the first electronic component, and the bump pad is formed by having the insulation layer and the via exposed to a lateral side of the cavity.


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