The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 12, 2018

Filed:

Aug. 31, 2015
Applicants:

Autonetworks Technologies, Ltd., Yokkaichi, Mie, JP;

Sumitomo Wiring Systems, Ltd., Yokkaichi, Mie, JP;

Sumitomo Electric Industries, Ltd., Osaka-shi, Osaka, JP;

Inventors:

Masanori Moriyasu, Mie, JP;

Masaaki Tabata, Mie, JP;

Hajime Matsui, Mie, JP;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01R 13/52 (2006.01); H01R 24/20 (2011.01); H01R 107/00 (2006.01);
U.S. Cl.
CPC ...
H01R 13/521 (2013.01); H01R 24/20 (2013.01); H01R 2107/00 (2013.01);
Abstract

It is aimed to enable a short circuit in a retainer insertion hole to be avoided. Short-circuit preventing walls () configured to partition between cavities () adjacent in an arrangement direction are provided in a retainer insertion hole (). A retainer () is provided with a plurality of frame-like portions () along the arrangement direction of the respective cavities (). Each frame-like portion () is formed to be able to communicate with the corresponding cavity (). Escaping grooves () are formed along a mounting direction of the retainer () between the frame-like portions () adjacent in the arrangement direction. Escaping grooves () are open on front end parts in the mounting direction of the retainer () such that the retainer () is mountable into the retainer insertion hole () while avoiding interference with the short circuit preventing walls ().


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