The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 12, 2018

Filed:

Feb. 11, 2016
Applicant:

Korea Advanced Institute of Science and Technology, Daejeon, KR;

Inventors:

Yang-Kyu Choi, Daejeon, KR;

Jun-Young Park, Daejeon, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 21/02 (2006.01); H01L 21/266 (2006.01); H01L 21/308 (2006.01); H01L 29/66 (2006.01); H01L 21/306 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0673 (2013.01); H01L 21/02694 (2013.01); H01L 21/266 (2013.01); H01L 21/3081 (2013.01); H01L 29/66568 (2013.01); H01L 21/30604 (2013.01); H01L 29/42392 (2013.01);
Abstract

A tunneling field-effect transistor may be provided that includes: a substrate; a source which is formed on the substrate and into which p+ type impurity ion is injected; a drain which is formed on the substrate and into which n+ type impurity ion is injected; a plurality of vertically stacked nanowire channels which are formed on the substrate; a gate insulation layer which is formed on the plurality of nanowire channels; and a gate which is formed on the gate insulation layer. As a result, it is possible to generate a higher driving current without changing the length of the gate and the area of the channel (degree of integration).


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