The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 12, 2018

Filed:

Sep. 07, 2016
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Gaku Sudo, Yokkaichi, JP;

Masanobu Baba, Yokkaichi, JP;

Megumi Ishiduki, Yokkaichi, JP;

Tadashi Iguchi, Yokkaichi, JP;

Murato Kawai, Yokkaichi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/115 (2017.01); H01L 27/11568 (2017.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11568 (2013.01); H01L 21/28282 (2013.01);
Abstract

According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method includes forming a stacked body alternately stacked with a plurality of members and a plurality of intermediate bodies having materials different from materials of the plurality of members, processing an end portion of at least two layers of the plurality of members sequentially in a stacking direction of the stacked body, and forming a step-wise step stacked with the plurality of members and the plurality of intermediate bodies, forming a plurality of side wall films contacting the step and making the end portion of the plurality of members in a step-wise. The making the end portion of the plurality of members in a step-wise includes retreating a portion of the plurality of members, the portion separated from the plurality of side wall films and exposed from the stacked body.


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