The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 12, 2018

Filed:

Apr. 15, 2015
Applicant:

Rf Micro Devices, Inc., Greensboro, NC (US);

Inventors:

Muhammad Iqbal Chaudhry, Greensboro, NC (US);

Nathaniel Peachey, Oak Ridge, NC (US);

Assignee:

Qorvo US, Inc., Greensboro, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H 9/00 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0251 (2013.01); H01L 27/0259 (2013.01);
Abstract

Aspects disclosed in the detailed description include an electrostatic discharge (ESD) protection circuit. In this regard, in one aspect, an ESD protection circuit is provided to protect an integrated circuit (IC) during fabrication and production. An ESD detection circuitry detects an ESD event by detecting a voltage spike between a supply rail and a ground rail exceeding an ESD threshold voltage. In response to detecting the ESD event, an ESD clamping circuitry is activated to discharge the ESD event, thus protecting the IC from being damaged by the ESD event. By detecting the ESD event based on the ESD threshold voltage, as opposed to detecting the ESD event based on rise time of the voltage spike, it is possible to prevent the ESD clamping circuitry from missing voltage spikes associated with a slow rise time or being falsely activated by a normal power-on voltage associated with a fast rise time.


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