The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 12, 2018

Filed:

Nov. 15, 2016
Applicant:

Honeywell International Inc., Morris Plains, NJ (US);

Inventors:

Eric E. Vogt, Independence, MN (US);

Gregor D. Dougal, Minneapolis, MN (US);

James L. Tucker, Clearwater, FL (US);

Assignee:

Honeywell International Inc., Morris Plains, NJ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5389 (2013.01); H01L 21/486 (2013.01); H01L 21/4853 (2013.01); H01L 21/4857 (2013.01); H01L 23/5383 (2013.01); H01L 23/5384 (2013.01); H01L 23/5386 (2013.01);
Abstract

The present disclosure describes a stacked integrated circuit system that includes two integrated circuit layers stacked on opposite sides of an interposer layer. The interposer layer may include at least one integrated circuit die and an interposer portion that includes a plurality of electrically conductive pillars arranged in a laterally patterned array within the interposer layer.


Find Patent Forward Citations

Vogt, Eric. (2018). Integrated circuit stack including a patterned array of electrically conductive pillars (U.S. Patent No. 9997466). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9997466

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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