The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 12, 2018

Filed:

Aug. 29, 2016
Applicant:

Japan Display Inc., Tokyo, JP;

Inventor:

Ilin Wu, Tokyo, JP;

Assignee:

Japan Display Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3258 (2016.01); G09G 3/3233 (2016.01); G09G 3/3266 (2016.01); G09G 3/3291 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3258 (2013.01); G09G 3/3233 (2013.01); G09G 3/3266 (2013.01); G09G 3/3291 (2013.01); G09G 2300/0439 (2013.01); G09G 2300/0814 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/0245 (2013.01); G09G 2310/0251 (2013.01); G09G 2310/08 (2013.01);
Abstract

A display device including pixel circuit groups containing pixel circuits. The pixel circuit groups each contain: a first transistor whose first terminal is connected to a power source potential line; and a sixth transistor whose control terminal is connected to a first scanning signal line and whose first terminal is connected to an image signal line. The pixel circuit each include: a second transistor whose control terminal is connected to a first node and whose first terminal is connected to a second terminal of the first transistor and a second terminal of the sixth transistor; a third transistor whose first terminal is connected to the first node and whose second terminal is connected to a second terminal of the second transistor; a fourth transistor whose first terminal is connected to the second terminal of the second transistor; and a fifth transistor whose first terminal is connected to the first node.


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