The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 12, 2018

Filed:

Apr. 27, 2016
Applicants:

Shanghai Tianma Am-oled Co., Ltd., Shanghai, CN;

Tianma Micro-electronics Co., Ltd., Shenzhen, CN;

Inventors:

Kuo Sun, Shanghai, CN;

Wenhui Zou, Shanghai, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/32 (2016.01); G09G 3/3266 (2016.01);
U.S. Cl.
CPC ...
G09G 3/32 (2013.01); G09G 3/3266 (2013.01); G09G 2300/0842 (2013.01); G09G 2310/0262 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01);
Abstract

A gate scan circuit is provided, which can include a first and a second control units, a first and second output units, and a first capacitor. The first control unit can control a voltage at a first node based on clock signals and an input signal. The second control unit can control a voltage at a second node based on a clock signal and a power source signal. The first and second output units can output a clock signals or power source signals based on the voltage at the first or second node. The first capacitor can include a first terminal receiving the second power source signal and a second terminal connected to the second node. The gate scan circuit may output two scan signals within one circuit, thereby narrowing the frame.


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