The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 29, 2018

Filed:

Sep. 06, 2016
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Hironori Uchikawa, Fujisawa, JP;

Kenji Sakurada, Yamato, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 16/10 (2006.01); G11C 11/56 (2006.01); G11C 16/16 (2006.01); G06F 3/06 (2006.01); G06F 11/10 (2006.01); G11C 16/26 (2006.01); G11C 29/52 (2006.01);
U.S. Cl.
CPC ...
G11C 16/04 (2013.01); G06F 3/064 (2013.01); G06F 11/1012 (2013.01); G11C 11/5628 (2013.01); G11C 16/10 (2013.01); G11C 16/16 (2013.01); G11C 11/5642 (2013.01); G11C 16/26 (2013.01); G11C 29/52 (2013.01);
Abstract

A memory system and method is provided. The memory system includes a non-volatile memory, a memory interface, and a code processor. The code processor generates a likelihood value for a first read bit, which is read from a first memory cell, from among read bits contained in a codeword read by the memory interface from the non-volatile memory. For example, the likelihood value can be based on the value of the first read bit and on the value of a second read bit read from a second memory cell adjacent to the first memory cell so as to decode the codeword using the generated likelihood value.


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