The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 29, 2018

Filed:

Apr. 27, 2016
Applicant:

Synaptic Engines, Llc, Naperville, IL (US);

Inventor:

Gautam Kavipurapu, Germantown, TN (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/45 (2006.01); G06F 15/80 (2006.01); G06F 9/48 (2006.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
G06F 15/80 (2013.01); G06F 9/4881 (2013.01); G06F 13/28 (2013.01);
Abstract

A novel scheduler design is provided that schedules a set of operations to an array of similar or dissimilar, candidate operations on a cycle by cycle basis, out of a total number of operations. The array of similar or dissimilar units can be atomic in nature or ALU like or complete processors. The scheduler is able to map the operations in a data flow/sequencing graph to the two dimensional or 3 dimensional array (which can be extended to a multi-dimensional array) optimally so as to minimize the total execution times. The mapping is path based computation, where a particular sequence of instructions is routed through the underlying matrix in path that minimized the number of memory hops.


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Kavipurapu, Gautam. (2018). Scheduler for a fine grained graph processor (U.S. Patent No. 9984037). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9984037

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